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/openbmc/linux/drivers/gpu/drm/msm/
H A Dmsm_gem_shrinker.c111 } stages[] = { in msm_gem_shrinker_scan() local
112 /* Stages of progressively more aggressive/expensive reclaim: */ in msm_gem_shrinker_scan()
122 for (unsigned i = 0; (nr > 0) && (i < ARRAY_SIZE(stages)); i++) { in msm_gem_shrinker_scan()
123 if (!stages[i].cond) in msm_gem_shrinker_scan()
125 stages[i].freed = in msm_gem_shrinker_scan()
126 drm_gem_lru_scan(stages[i].lru, nr, in msm_gem_shrinker_scan()
127 &stages[i].remaining, in msm_gem_shrinker_scan()
128 stages[i].shrink); in msm_gem_shrinker_scan()
129 nr -= stages[i].freed; in msm_gem_shrinker_scan()
130 freed += stages[i].freed; in msm_gem_shrinker_scan()
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/openbmc/u-boot/include/dm/
H A Dutil.h46 * in the loader stages via special devicetree properties.
49 * are required in either SPL or TPL stages.
53 * SPL/TPL stages.
72 * in the loader stages via special devicetree properties.
75 * are required in either SPL or TPL stages.
79 * SPL/TPL stages.
/openbmc/linux/include/trace/
H A Dtrace_custom_events.h24 #include "stages/init.h"
38 #include "stages/stage1_struct_define.h"
59 #include "stages/stage2_data_offsets.h"
74 #include "stages/stage3_trace_output.h"
105 #include "stages/stage4_event_fields.h"
117 #include "stages/stage5_get_offsets.h"
137 #include "stages/stage6_event_callback.h"
185 #include "stages/stage7_class_define.h"
H A Dtrace_events.h27 #include "stages/init.h"
48 #include "stages/stage1_struct_define.h"
112 #include "stages/stage2_data_offsets.h"
184 #include "stages/stage3_trace_output.h"
239 #include "stages/stage4_event_fields.h"
255 #include "stages/stage5_get_offsets.h"
378 #include "stages/stage6_event_callback.h"
449 #include "stages/stage7_class_define.h"
/openbmc/qemu/.gitlab-ci.d/
H A Dstages.yml1 # Currently we have two build stages after our containers are built:
3 # - test (for test stages, using build artefacts from a build stage)
4 stages:
H A Dqemu-project.yml13 - local: '/.gitlab-ci.d/stages.yml'
/openbmc/pldm/oem/ibm/libpldmresponder/
H A Dplatform_oem_ibm.cpp36 using Stages = BootProgress::ProgressStages; in sendBiosAttributeUpdateEvent() typedef
37 auto currHostState = sdbusplus::message::convert_from_string<Stages>( in sendBiosAttributeUpdateEvent()
41 if (currHostState != Stages::SystemInitComplete && in sendBiosAttributeUpdateEvent()
42 currHostState != Stages::OSRunning && in sendBiosAttributeUpdateEvent()
43 currHostState != Stages::SystemSetup) in sendBiosAttributeUpdateEvent()
/openbmc/u-boot/include/
H A Dbootstage.h39 * A list of boot stages that we know about. Each of these indicates the
103 /* Boot stages related to loading a kernel from an IDE device */
118 /* Boot stages related to loading a kernel from an NAND device */
127 /* Boot stages related to loading a kernel from an network device */
140 * Boot stages related to loading a FIT image. Some of these are a
155 BOOTSTAGE_ID_FIT_RD_START = 120, /* Ramdisk stages */
158 BOOTSTAGE_ID_FIT_SETUP_START = 130, /* x86 setup stages */
168 * These boot stages are new, higher level, and not directly related
/openbmc/linux/drivers/staging/media/atomisp/pci/runtime/pipeline/src/
H A Dpipeline.c246 s = pipeline->stages; in ia_css_pipeline_clean()
282 last = pipeline->stages; in ia_css_pipeline_create_and_add_stage()
305 /* Do this only for ISP stages*/ in ia_css_pipeline_create_and_add_stage()
324 pipeline->stages = new_stage; in ia_css_pipeline_create_and_add_stage()
342 for (stage = pipeline->stages; stage; stage = stage->next) { in ia_css_pipeline_finalize_stages()
362 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_stage()
381 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_stage_from_fw()
401 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_fw_from_stage()
424 for (s = pipeline->stages; s; s = s->next) { in ia_css_pipeline_get_output_stage()
489 * we use a pipeline. A pipeline contains a number of stages, each with
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/openbmc/linux/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/
H A Dia_css_pipeline.h42 /* Pipeline of n stages to be executed on SP/ISP per stage */
47 struct ia_css_pipeline_stage *stages; member
141 /* @brief clean all the stages pipeline and make it as new
165 /* @brief Finalize the stages in a pipeline
170 * This API is expected to be called after adding all stages
/openbmc/linux/tools/testing/selftests/tc-testing/
H A DREADME79 A test case has four stages:
86 The setup and teardown stages can run zero or more commands. The setup
89 can be run next. These two stages require any commands run to return
92 The execute and verify stages each run one command. The execute stage
201 adjust-command (runs in all stages and receives the stage name)
213 The stages are identified by the following strings:
/openbmc/linux/arch/ia64/lib/
H A Dcopy_page_mck.S29 * has 2*PREFETCH_DIST+K stages. The first PREFETCH_DIST stages are used for prefetching
30 * source cache-lines. The second PREFETCH_DIST stages are used for prefetching destination
31 * cache-lines, the last K stages are used to copy the cache-line words not copied by
140 mov ar.ec = N // # of stages in pipeline
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-health-afe440x6 Get measured values from the ADC for these stages. Y is the
30 stages. The values are expressed in 5-bit sign-magnitude.
/openbmc/linux/drivers/watchdog/
H A Dsbsa_gwdt.c18 * or a two stages watchdog, it's set up by the module parameter "action".
21 * In the two stages mode, when the timeout is reached, the first signal (WS0)
29 * if action is 1 (the two stages mode):
37 * Note: Since this watchdog timer has two stages, and each stage is determined
39 * stages mode, the timeout is WOR. The maximum timeout in the two stages mode
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dti,tas5086.txt28 stages connected to the PWM output pins work. Not all
29 power stages are compatible to Mid-Z - please refer
/openbmc/linux/drivers/spi/
H A Dspi-sh-msiof.c139 #define SIFCTR_TFWM_64 (0UL << 29) /* Transfer Request when 64 empty stages */
140 #define SIFCTR_TFWM_32 (1UL << 29) /* Transfer Request when 32 empty stages */
141 #define SIFCTR_TFWM_24 (2UL << 29) /* Transfer Request when 24 empty stages */
142 #define SIFCTR_TFWM_16 (3UL << 29) /* Transfer Request when 16 empty stages */
143 #define SIFCTR_TFWM_12 (4UL << 29) /* Transfer Request when 12 empty stages */
144 #define SIFCTR_TFWM_8 (5UL << 29) /* Transfer Request when 8 empty stages */
145 #define SIFCTR_TFWM_4 (6UL << 29) /* Transfer Request when 4 empty stages */
151 #define SIFCTR_RFWM_1 (0 << 13) /* Transfer Request when 1 valid stages */
152 #define SIFCTR_RFWM_4 (1 << 13) /* Transfer Request when 4 valid stages */
153 #define SIFCTR_RFWM_8 (2 << 13) /* Transfer Request when 8 valid stages */
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/openbmc/linux/sound/ppc/
H A Dsnd_ps3.h96 /* how many stages the fifo have */
98 /* fifo size 128 bytes * 8 stages * stereo (2ch) */
/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_ctl.c60 int stages = -EINVAL; in _mixer_stages() local
64 stages = mixer[i].sblk->maxblendstages; in _mixer_stages()
69 return stages; in _mixer_stages()
450 int stages; in dpu_hw_ctl_setup_blendstage() local
453 stages = _mixer_stages(ctx->mixer_hw_caps, ctx->mixer_count, lm); in dpu_hw_ctl_setup_blendstage()
454 if (stages < 0) in dpu_hw_ctl_setup_blendstage()
468 for (i = 0; i <= stages; i++) { in dpu_hw_ctl_setup_blendstage()
/openbmc/pldm/host-bmc/
H A Ddbus_to_terminus_effecters.cpp197 using Stages = BootProgress::ProgressStages; in isHostOn() typedef
198 auto currHostState = sdbusplus::message::convert_from_string<Stages>( in isHostOn()
202 if (currHostState != Stages::SystemInitComplete && in isHostOn()
203 currHostState != Stages::OSRunning && in isHostOn()
204 currHostState != Stages::SystemSetup && in isHostOn()
205 currHostState != Stages::OEM) in isHostOn()
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dmtk-sd.yaml105 This field has total 32 stages.
114 This field has total 32 stages.
130 pad macro, there are 32 stages from 0 to 31.
/openbmc/linux/arch/sh/include/asm/
H A Dsh_bios.h10 * usually from within the early stages of kernel boot.
/openbmc/qemu/tests/migration/guestperf/
H A Dcomparison.py29 # at various stages of iteration over RAM
59 # stages of the migration
/openbmc/u-boot/arch/arm/lib/
H A Dcrt0_64.S18 * This file handles the target-independent stages of the U-Boot
35 * store any data which must be passed on to later stages. These
/openbmc/linux/Documentation/arch/arm/sa1100/
H A Dlart.rst11 is under development, with plenty of others in different stages of
/openbmc/openbmc/meta-arm/meta-arm/classes/
H A Dsbsign.bbclass21 # stages. Instead they can call this function when needed by calling this function

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