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/openbmc/u-boot/board/bosch/shc/
H A Dmux.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
21 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_RXD */
22 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */
23 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_CTS */
24 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDDIS)}, /* UART0_RTS */
25 {-1},
29 {OFFSET(uart1_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART1_RXD */
30 {OFFSET(uart1_txd), (MODE(0) | PULLUDDIS)}, /* UART1_TXD */
31 {OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART1_CTS */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-mapphone-mdm6600.txt4 - compatible Must be "motorola,mapphone-mdm6600"
5 - enable-gpios GPIO to enable the USB PHY
6 - power-gpios GPIO to power on the device
7 - reset-gpios GPIO to reset the device
8 - motorola,mode-gpios Two GPIOs to configure MDM6600 USB start-up mode for
9 normal mode versus USB flashing mode
10 - motorola,cmd-gpios Three GPIOs to control the power state of the MDM6600
11 - motorola,status-gpios Three GPIOs to read the power state of the MDM6600
15 usb-phy {
16 compatible = "motorola,mapphone-mdm6600";
[all …]
/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_gpio-test.c4 * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
5 * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr>
8 * See the COPYING file in the top-level directory.
12 #include "libqtest-single.h"
84 #define GPIO_ADDR_MASK (~(GPIO_SIZE - 1))
121 return (gpio_addr - GPIO_BASE_ADDR) / GPIO_SIZE; in get_gpio_id()
137 r = qtest_qmp(global_qtest, "{ 'execute': 'qom-set', 'arguments': " in disconnect_all_pins()
138 "{ 'path': %s, 'property': 'disconnected-pins', 'value': %d } }", in disconnect_all_pins()
151 r = qtest_qmp(global_qtest, "{ 'execute': 'qom-get', 'arguments':" in get_disconnected_pins()
152 " { 'path': %s, 'property': 'disconnected-pins'} }", path); in get_disconnected_pins()
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/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-baltos-ir2110.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi"
21 uart1_pins: uart1-pins {
22 pinctrl-single,pins = <
27 …AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] D…
28 …AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2[23] DS…
29 …AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_pclk.gpio2[24] DCD …
[all …]
H A Dam335x-baltos-ir3220.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi"
21 tca6416_pins: tca6416-pins {
22 pinctrl-single,pins = <
27 uart1_pins: uart1-pins {
28 pinctrl-single,pins = <
33 …AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_vsync.gpio2[22] D…
[all …]
H A Dam335x-baltos-ir5221.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi"
21 tca6416_pins: tca6416-pins {
22 pinctrl-single,pins = <
28 dcan1_pins: dcan1-pins {
29 pinctrl-single,pins = <
35 uart1_pins: uart1-pins {
[all …]
H A Dam335x-netcom-plus-2xx.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi"
21 uart1_pins: uart1-pins {
22 pinctrl-single,pins = <
34 uart2_pins: uart2-pins {
35 pinctrl-single,pins = <
58 pinctrl-names = "default";
[all …]
H A Dmotorola-mapphone-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "motorola-cpcap-mapphone.dtsi"
10 stdout-path = &uart3;
19 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
20 * then 1023 - 1024 seems to contain mbm.
28 gpio-poweroff {
29 compatible = "gpio-poweroff";
30 pinctrl-0 = <&poweroff_gpio>;
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/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-max3191x.txt4 - compatible: Must be one of:
11 - reg: Chip select number.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells: Should be two. For consumer use see gpio.txt.
16 - #daisy-chained-devices:
17 Number of chips in the daisy-chain (default is 1).
18 - maxim,modesel-gpios: GPIO pins to configure modesel of each chip.
19 The number of GPIOs must equal "#daisy-chained-devices"
22 - maxim,fault-gpios: GPIO pins to read fault of each chip.
23 The number of GPIOs must equal "#daisy-chained-devices"
[all …]
H A Dxlnx,gpio-xilinx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neeli Srinivas <srinivas.neeli@amd.com>
14 to an AXI4-Lite interface. The AXI GPIO can be configured as either
15 a single or a dual-channel device. The width of each channel is
22 - xlnx,xps-gpio-1.00.a
27 "#gpio-cells":
33 gpio-controller: true
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/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-l-50.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Check Point L-50 Board Description
7 /dts-v1/;
10 #include "kirkwood-6281.dtsi"
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
23 stdout-path = &uart0;
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
29 pinctrl-names = "default";
[all …]
/openbmc/linux/arch/mips/include/asm/mach-au1x00/
H A Dgpio-au1000.h12 #include <asm/mach-au1x00/au1000.h>
15 * GPIO0-31 from GPIO1 block, GPIO200-215 from GPIO2 block.
22 #define ALCHEMY_GPIO1_MAX (ALCHEMY_GPIO1_BASE + ALCHEMY_GPIO1_NUM - 1)
23 #define ALCHEMY_GPIO2_MAX (ALCHEMY_GPIO2_BASE + ALCHEMY_GPIO2_NUM - 1)
36 /* register offsets within GPIO2 block */
47 return MAKE_IRQ(1, gpio - ALCHEMY_GPIO1_BASE); in au1000_gpio1_to_irq()
52 return -ENXIO; in au1000_gpio2_to_irq()
58 return ALCHEMY_GPIO1_BASE + (irq - AU1000_GPIO0_INT) + 0; in au1000_irq_to_gpio()
60 return -ENXIO; in au1000_irq_to_gpio()
65 gpio -= ALCHEMY_GPIO1_BASE; in au1500_gpio1_to_irq()
[all …]
/openbmc/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs-icicle-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-icicle-kit-fabric.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
15 model = "Microchip PolarFire-SoC Icicle Kit";
16 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
29 stdout-path = "serial1:115200n8";
33 timebase-frequency = <RTCCLK_FREQ>;
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-winbond.c1 // SPDX-License-Identifier: GPL-2.0+
104 /* GPIO1, GPIO2, SUSLED logical device */
145 return -EBUSY; in winbond_sio_enter()
149 * in order for chip to enter the "Extended Function Mode" in winbond_sio_enter()
206 * struct winbond_gpio_port_conflict - possibly conflicting device information
209 * is located (or WB_SIO_DEV_NONE - don't select any
226 * struct winbond_gpio_info - information about a particular GPIO port (device)
231 * @outputreg: output driver mode bit register number
232 * @outputppbit: index of a push-pull output driver mode bit
361 *gpio_num -= 8; in winbond_gpio_get_info()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dsolomon,ssd1307fb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Ripard <mripard@kernel.org>
11 - Javier Martinez Canillas <javierm@redhat.com>
17 - enum:
18 - solomon,ssd1305fb-i2c
19 - solomon,ssd1306fb-i2c
20 - solomon,ssd1307fb-i2c
21 - solomon,ssd1309fb-i2c
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
27 stdout-path = &uart2;
36 compatible = "fixed-clock";
[all …]
H A Dimx8mn-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
17 compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";
24 stdout-path = &uart2;
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
[all …]
H A Dimx8mm-phyboard-polis-rdk.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include "imx8mm-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
16 compatible = "phytec,imx8mm-phyboard-polis-rdk",
17 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
20 stdout-path = &uart3;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dste,nomadik.txt4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
23 (see pinctrl-bindings.txt):
26 - function: A string containing the name of the function to mux to the
28 - groups : An array of strings. Each string contains the name of a pin
30 set-up.
33 - pins: A string array describing the pins affected by the configuration
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Dmaxim,max8903.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 - $ref: power-supply.yaml#
19 dok-gpios:
23 uok-gpios:
27 cen-gpios:
31 chg-gpios:
35 flt-gpios:
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-radxa-cm3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
18 compatible = "gpio-leds";
20 led-0 {
24 linux,default-trigger = "timer";
25 default-state = "on";
26 pinctrl-names = "default";
27 pinctrl-0 = <&user_led2>;
31 vcc_sys: vcc-sys-regulator {
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-m28cu3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
19 compatible = "pwm-backlight";
21 brightness-levels = <0 4 8 16 32 64 128 255>;
22 default-brightness-level = <6>;
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&led_pins_gpio>;
31 label = "sd0-led";
32 gpios = <&gpio2 26 0>;
[all …]
H A Dimx28-cfa10056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA-10037 DTS.
10 #include "imx28-cfa10037.dts"
13 model = "Crystalfontz CFA-10056 Board";
16 spi-2 {
17 compatible = "spi-gpio";
18 pinctrl-names = "default";
19 pinctrl-0 = <&spi2_pins_cfa10056>;
21 sck-gpios = <&gpio2 16 0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8250-sony-xperia-edo.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 /delete-node/ &adsp_mem;
14 /delete-node/ &spss_mem;
15 /delete-node/ &cdsp_secure_heap;
18 qcom,msm-id = <356 0x20001>; /* SM8250 v2.1 */
19 qcom,board-id = <0x10008 0>;
22 #address-cells = <2>;
23 #size-cells = <2>;
27 compatible = "simple-framebuffer";
[all …]
/openbmc/linux/arch/mips/boot/dts/ni/
H A D169445.dts1 /dts-v1/;
4 #address-cells = <1>;
5 #size-cells = <1>;
9 #address-cells = <1>;
10 #size-cells = <0>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <50000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
[all …]

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