| /openbmc/u-boot/doc/device-tree-bindings/spi/ |
| H A D | spi-bus.txt | 10 - #address-cells - number of cells required to define a chip select
12 - #size-cells - should be zero.
13 - compatible - name of SPI bus controller following generic names
15 - cs-gpios - (optional) gpios chip select.
20 flexible and non-standardized, it is left out of this binding with the
26 - num-cs : total number of chipselects
28 If cs-gpios is used the number of chip select will automatically increased
29 with max(cs-gpios > hw cs)
31 So if for example the controller has 2 CS lines, and the cs-gpios
34 cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
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| H A D | spi-zynq.txt | 2 -------------------------------------------
5 - compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
6 - reg : Physical base address and size of SPI registers map.
7 - interrupts : Property with a value describing the interrupt
8 number.
9 - interrupt-parent : Must be core interrupt controller
10 - clock-names : List of input clock names - "ref_clk", "pclk"
12 - clocks : Clock phandles (see clock bindings for details).
13 - spi-max-frequency : Maximum SPI clocking speed of device in Hz
16 - num-cs : Number of chip selects used.
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| H A D | soft-spi.txt | 4 SPI bus. No SPI host is required for this to work. The down-side is that the
10 compatible: "spi-gpio"
11 cs-gpios: GPIOs to use for SPI chip select (output)
12 gpio-sck: GPIO to use for SPI clock (output)
14 gpio-mosi: GPIO to use for SPI MOSI line (output)
15 gpio-miso: GPIO to use for SPI MISO line (input)
18 spi-delay-us: Number of microseconds of delay between each CS transition
22 typically holds the GPIO number.
27 soft-spi {
28 compatible = "spi-gpio";
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | ti-aemif.txt | 4 provide a glue-less interface to a variety of asynchronous memory devices like
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
24 - #address-cells: Must be 2. The partition number has to be encoded in the
25 first address cell and it may accept values 0..N-1
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| H A D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | spear_spics.txt | 1 === ST Microelectronics SPEAr SPI CS Driver ===
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
30 -------
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| /openbmc/u-boot/include/ |
| H A D | spi.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Common SPI Interface: Controller-specific definitions
21 #define SPI_CS_HIGH BIT(2) /* CS active high */
22 #define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */
46 * struct dm_spi_platdata - platform data for all SPI slaves
50 * dev_get_parent_platdata(slave->dev).
55 * @cs: Chip select number (0..n-1)
60 unsigned int cs; member
68 * struct spi_slave - Representation of a SPI slave
70 * For driver model this is the per-child data used by the SPI bus. It can
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| /openbmc/qemu/include/gdbstub/ |
| H A D | user.h | 2 * gdbstub user-mode only APIs
6 * SPDX-License-Identifier: LGPL-2.0-or-later
15 * gdb_handlesig() - yield control to gdb
17 * @sig: if non-zero, the signal number which caused us to stop
19 * @siginfo: target-specific siginfo struct
20 * @siginfo_len: target-specific siginfo struct length
22 * This function yields control to gdb, when a user-mode-only target
23 * needs to stop execution. If @sig is non-zero, then we will send a
35 * gdb_signalled() - inform remote gdb of sig exit
37 * @sig: signal number
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| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_spd.c | 1 // SPDX-License-Identifier: GPL-2.0
196 * Name: ddr3_get_dimm_num - Find number of dimms and their addresses
198 * Args: dimm_addr - array of dimm addresses
211 dimm_cur_addr--) { in ddr3_get_dimm_num()
214 /* Far-End DIMM must be connected */ in ddr3_get_dimm_num()
232 * Name: dimmSpdInit - Get the SPD parameters.
234 * Args: dimmNum - DIMM number. See MV_BOARD_DIMM_NUM enumerator.
235 * info - DIMM information structure.
261 info->err_check_type = 0; in ddr3_spd_init()
265 info->err_check_type = 1; in ddr3_spd_init()
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| /openbmc/u-boot/cmd/ |
| H A D | spi.c | 1 // SPDX-License-Identifier: GPL-2.0+
17 /*-----------------------------------------------------------------------
22 # define MAX_SPI_BYTES 32 /* Maximum number of bytes we can handle */
29 static unsigned int cs; variable
35 static int do_spi_xfer(int bus, int cs) in do_spi_xfer() argument
44 snprintf(name, sizeof(name), "generic_%d:%d", bus, cs); in do_spi_xfer()
47 return -ENOMEM; in do_spi_xfer()
48 ret = spi_get_bus_and_cs(bus, cs, 1000000, mode, "spi_generic_drv", in do_spi_xfer()
53 slave = spi_setup_slave(bus, cs, 1000000, mode); in do_spi_xfer()
55 printf("Invalid device %d:%d\n", bus, cs); in do_spi_xfer()
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| /openbmc/linux/tools/testing/selftests/cachestat/ |
| H A D | test_cachestat.c | 1 // SPDX-License-Identifier: GPL-2.0
28 void print_cachestat(struct cachestat *cs) in print_cachestat() argument
32 cs->nr_cache, cs->nr_dirty, cs->nr_writeback, in print_cachestat()
33 cs->nr_evicted, cs->nr_recently_evicted); in print_cachestat()
68 remained -= read_len; in write_exactly()
84 remained -= write_len; in write_exactly()
115 * If test_fsync == true, fsync the file, then check the number of dirty
126 struct cachestat cs; in test_cachestat() local
131 if (fd == -1) { in test_cachestat()
147 syscall_ret = syscall(__NR_cachestat, fd, &cs_range, &cs, 0); in test_cachestat()
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| /openbmc/linux/drivers/memory/ |
| H A D | ti-aemif.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 - 2013 Texas Instruments Incorporated. http://www.ti.com/
8 * Murali Karicheri <m-karicheri2@ti.com>
20 #include <linux/platform_data/ti-aemif.h>
84 * struct aemif_cs_data: structure to hold cs parameters
85 * @cs: chip-select number
98 u8 cs; member
116 * @num_cs: number of assigned chip-selects
117 * @cs_offset: start number of cs nodes
118 * @cs_data: array of chip-select settings
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| /openbmc/linux/include/uapi/drm/ |
| H A D | habanalabs_accel.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
3 * Copyright 2016-2022 HabanaLabs, Ltd.
15 * Defines that are asic-specific but constitutes as ABI between kernel driver
33 /* Max number of elements in timestamps registration buffers */
196 * stream id is a running number from 0 up to (N-1), where N is the number
657 * enum hl_goya_dma_direction - Direction of DMA operation inside a LIN_DMA packet that is
669 * @HL_DMA_ENUM_MAX: number of values in enum
684 * enum hl_device_status - Device status information.
716 * Notifier event values - for the notification mechanism and the HL_INFO_GET_EVENTS command
718 * HL_NOTIFIER_EVENT_TPC_ASSERT - Indicates TPC assert event
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-davinci.txt | 4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
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| H A D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
31 If that property is used, the number of chip selects will be
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| H A D | spi-lantiq-ssc.txt | 4 - compatible: "lantiq,ase-spi", "lantiq,falcon-spi", "lantiq,xrx100-spi",
5 "intel,lgm-spi"
6 - #address-cells: see spi-bus.txt
7 - #size-cells: see spi-bus.txt
8 - reg: address and length of the spi master registers
9 - interrupts:
10 For compatible "intel,lgm-ssc" - the common interrupt number for
18 - clocks: spi clock phandle
19 - num-cs: see spi-bus.txt, set to 8 if unset
20 - base-cs: the number of the first chip select, set to 1 if unset.
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| /openbmc/linux/Documentation/usb/ |
| H A D | gadget_configfs.rst | 19 a number of interfaces which, from the gadget's perspective, are known as
22 Linux provides a number of functions for gadgets to use.
50 http://www.spinics.net/lists/linux-usb/msg76388.html)
55 $ mount none $CONFIGFS_HOME -t configfs
60 -----------------------
81 A gadget also needs its serial number, manufacturer and product strings.
89 $ echo <serial number> > strings/0x409/serialnumber
104 ------------------------------
106 Each gadget will consist of a number of configurations, their corresponding
109 $ mkdir configs/<name>.<number>
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| /openbmc/u-boot/drivers/spi/ |
| H A D | davinci_spi.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
60 * driver. Platform can configure number of CS using CONFIG_SYS_SPI0_NUM_CS
61 * if more than one CS is supported and by defining CONFIG_SYS_SPI0.
70 * define CONFIG_SYS_SPI1 when platform has spi-1 device (bus #1) and
71 * CONFIG_SYS_SPI1_NUM_CS defines number of CS on this bus
80 * define CONFIG_SYS_SPI2 when platform has spi-2 device (bus #2) and
81 * CONFIG_SYS_SPI2_NUM_CS defines number of CS on this bus
128 u8 num_cs; /* total no. of CS available */
129 u8 cur_cs; /* CS of current slave */
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| H A D | fsl_dspi.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
6 * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
33 /* max chipselect signals number */
42 /* CTAR register pre-configure value */
51 /* CTAR register pre-configure mask */
61 * struct fsl_dspi_platdata - platform data for Freescale DSPI
65 * @num_chipselect: Number of DSPI chipselect signals
76 * struct fsl_dspi_priv - private data for Freescale DSPI
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| /openbmc/linux/drivers/net/slip/ |
| H A D | slhc.c | 21 * - Initial distribution.
28 * - 01-31-90 initial adaptation (from 1.19)
29 * PPP.05 02-15-90 [ks]
30 * PPP.08 05-02-90 [ks] use PPP protocol field to signal compression
31 * PPP.15 09-90 [ks] improve mbuf handling
32 * PPP.16 11-02 [karn] substantially rewritten to use NOS facilities
34 * - Feb 1991 Bill_Simpson@um.cc.umich.edu
35 * variable number of conversation slots
39 * - Jul 1994 Dmitry Gorodchanin
41 * - Oct 1994 Dmitry Gorodchanin
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| /openbmc/linux/include/linux/ |
| H A D | clocksource.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
35 * struct clocksource - hardware abstraction for a free running counter
36 * Provides mostly state-free accessors to the underlying hardware.
48 * @archdata: Optional arch-specific data
57 * 1-99: Unfit for real use
59 * 100-199: Base level usability.
61 * 200-299: Good.
63 * 300-399: Desired.
65 * 400-499: Perfect
66 * The ideal clocksource. A must-use where
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| /openbmc/u-boot/board/tqc/tqm834x/ |
| H A D | tqm834x.c | 1 // SPDX-License-Identifier: GPL-2.0+
44 static long int get_ddr_bank_size(short cs, long *base);
45 static void set_cs_bounds(short cs, ulong base, ulong size);
46 static void set_cs_config(short cs, long config);
53 * Board initialzation after relocation to RAM. Used to detect the number
58 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in board_early_init_r()
61 /* detect the number of Flash banks */ in board_early_init_r()
72 int cs; in dram_init() local
75 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE; in dram_init()
76 im->sysconf.ddrlaw[0].ar = (LAWAR_EN | LAWAR_SIZE_2G); in dram_init()
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| /openbmc/qemu/include/semihosting/ |
| H A D | console.h | 6 * SPDX-License-Identifier: GPL-2.0-or-later
16 * @cs: CPUState
21 * block if no data is available we suspend the CPU and will re-execute the
24 * - CPUState is synchronized before calling this function
25 * - pc is only updated once the character is successfully returned
27 * Returns: number of characters read, OR cpu_loop_exit!
29 int qemu_semihosting_console_read(CPUState *cs, void *buf, int len);
38 * Returns: number of bytes written -- this should only ever be short
45 * @cs: CPUState
47 * If no data is available we suspend the CPU and will re-execute the
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| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | nvidia,tegra20-gmi.txt | 10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
20 - #size-cells: The number of cells used to represent the size of an address
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| H A D | imx-weim.txt | 5 wireless and mobile applications that use low-power technology.
11 - compatible: Should contain one of the following:
12 "fsl,imx1-weim"
13 "fsl,imx27-weim"
14 "fsl,imx51-weim"
15 "fsl,imx50-weim"
16 "fsl,imx6q-weim"
17 - reg: A resource specifier for the register space
19 - clocks: the clock, see the example below.
20 - #address-cells: Must be set to 2 to allow memory address translation
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