xref: /openbmc/linux/drivers/memory/ti-aemif.c (revision 083008de)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * TI AEMIF driver
4  *
5  * Copyright (C) 2010 - 2013 Texas Instruments Incorporated. http://www.ti.com/
6  *
7  * Authors:
8  * Murali Karicheri <m-karicheri2@ti.com>
9  * Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
10  */
11 
12 #include <linux/clk.h>
13 #include <linux/err.h>
14 #include <linux/io.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/of.h>
18 #include <linux/of_platform.h>
19 #include <linux/platform_device.h>
20 #include <linux/platform_data/ti-aemif.h>
21 
22 #define TA_SHIFT	2
23 #define RHOLD_SHIFT	4
24 #define RSTROBE_SHIFT	7
25 #define RSETUP_SHIFT	13
26 #define WHOLD_SHIFT	17
27 #define WSTROBE_SHIFT	20
28 #define WSETUP_SHIFT	26
29 #define EW_SHIFT	30
30 #define SSTROBE_SHIFT	31
31 
32 #define TA(x)		((x) << TA_SHIFT)
33 #define RHOLD(x)	((x) << RHOLD_SHIFT)
34 #define RSTROBE(x)	((x) << RSTROBE_SHIFT)
35 #define RSETUP(x)	((x) << RSETUP_SHIFT)
36 #define WHOLD(x)	((x) << WHOLD_SHIFT)
37 #define WSTROBE(x)	((x) << WSTROBE_SHIFT)
38 #define WSETUP(x)	((x) << WSETUP_SHIFT)
39 #define EW(x)		((x) << EW_SHIFT)
40 #define SSTROBE(x)	((x) << SSTROBE_SHIFT)
41 
42 #define ASIZE_MAX	0x1
43 #define TA_MAX		0x3
44 #define RHOLD_MAX	0x7
45 #define RSTROBE_MAX	0x3f
46 #define RSETUP_MAX	0xf
47 #define WHOLD_MAX	0x7
48 #define WSTROBE_MAX	0x3f
49 #define WSETUP_MAX	0xf
50 #define EW_MAX		0x1
51 #define SSTROBE_MAX	0x1
52 #define NUM_CS		4
53 
54 #define TA_VAL(x)	(((x) & TA(TA_MAX)) >> TA_SHIFT)
55 #define RHOLD_VAL(x)	(((x) & RHOLD(RHOLD_MAX)) >> RHOLD_SHIFT)
56 #define RSTROBE_VAL(x)	(((x) & RSTROBE(RSTROBE_MAX)) >> RSTROBE_SHIFT)
57 #define RSETUP_VAL(x)	(((x) & RSETUP(RSETUP_MAX)) >> RSETUP_SHIFT)
58 #define WHOLD_VAL(x)	(((x) & WHOLD(WHOLD_MAX)) >> WHOLD_SHIFT)
59 #define WSTROBE_VAL(x)	(((x) & WSTROBE(WSTROBE_MAX)) >> WSTROBE_SHIFT)
60 #define WSETUP_VAL(x)	(((x) & WSETUP(WSETUP_MAX)) >> WSETUP_SHIFT)
61 #define EW_VAL(x)	(((x) & EW(EW_MAX)) >> EW_SHIFT)
62 #define SSTROBE_VAL(x)	(((x) & SSTROBE(SSTROBE_MAX)) >> SSTROBE_SHIFT)
63 
64 #define NRCSR_OFFSET	0x00
65 #define AWCCR_OFFSET	0x04
66 #define A1CR_OFFSET	0x10
67 
68 #define ACR_ASIZE_MASK	0x3
69 #define ACR_EW_MASK	BIT(30)
70 #define ACR_SSTROBE_MASK	BIT(31)
71 #define ASIZE_16BIT	1
72 
73 #define CONFIG_MASK	(TA(TA_MAX) | \
74 				RHOLD(RHOLD_MAX) | \
75 				RSTROBE(RSTROBE_MAX) |	\
76 				RSETUP(RSETUP_MAX) | \
77 				WHOLD(WHOLD_MAX) | \
78 				WSTROBE(WSTROBE_MAX) | \
79 				WSETUP(WSETUP_MAX) | \
80 				EW(EW_MAX) | SSTROBE(SSTROBE_MAX) | \
81 				ASIZE_MAX)
82 
83 /**
84  * struct aemif_cs_data: structure to hold cs parameters
85  * @cs: chip-select number
86  * @wstrobe: write strobe width, ns
87  * @rstrobe: read strobe width, ns
88  * @wsetup: write setup width, ns
89  * @whold: write hold width, ns
90  * @rsetup: read setup width, ns
91  * @rhold: read hold width, ns
92  * @ta: minimum turn around time, ns
93  * @enable_ss: enable/disable select strobe mode
94  * @enable_ew: enable/disable extended wait mode
95  * @asize: width of the asynchronous device's data bus
96  */
97 struct aemif_cs_data {
98 	u8	cs;
99 	u16	wstrobe;
100 	u16	rstrobe;
101 	u8	wsetup;
102 	u8	whold;
103 	u8	rsetup;
104 	u8	rhold;
105 	u8	ta;
106 	u8	enable_ss;
107 	u8	enable_ew;
108 	u8	asize;
109 };
110 
111 /**
112  * struct aemif_device: structure to hold device data
113  * @base: base address of AEMIF registers
114  * @clk: source clock
115  * @clk_rate: clock's rate in kHz
116  * @num_cs: number of assigned chip-selects
117  * @cs_offset: start number of cs nodes
118  * @cs_data: array of chip-select settings
119  */
120 struct aemif_device {
121 	void __iomem *base;
122 	struct clk *clk;
123 	unsigned long clk_rate;
124 	u8 num_cs;
125 	int cs_offset;
126 	struct aemif_cs_data cs_data[NUM_CS];
127 };
128 
129 /**
130  * aemif_calc_rate - calculate timing data.
131  * @pdev: platform device to calculate for
132  * @wanted: The cycle time needed in nanoseconds.
133  * @clk: The input clock rate in kHz.
134  * @max: The maximum divider value that can be programmed.
135  *
136  * On success, returns the calculated timing value minus 1 for easy
137  * programming into AEMIF timing registers, else negative errno.
138  */
aemif_calc_rate(struct platform_device * pdev,int wanted,unsigned long clk,int max)139 static int aemif_calc_rate(struct platform_device *pdev, int wanted,
140 			   unsigned long clk, int max)
141 {
142 	int result;
143 
144 	result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
145 
146 	dev_dbg(&pdev->dev, "%s: result %d from %ld, %d\n", __func__, result,
147 		clk, wanted);
148 
149 	/* It is generally OK to have a more relaxed timing than requested... */
150 	if (result < 0)
151 		result = 0;
152 
153 	/* ... But configuring tighter timings is not an option. */
154 	else if (result > max)
155 		result = -EINVAL;
156 
157 	return result;
158 }
159 
160 /**
161  * aemif_config_abus - configure async bus parameters
162  * @pdev: platform device to configure for
163  * @csnum: aemif chip select number
164  *
165  * This function programs the given timing values (in real clock) into the
166  * AEMIF registers taking the AEMIF clock into account.
167  *
168  * This function does not use any locking while programming the AEMIF
169  * because it is expected that there is only one user of a given
170  * chip-select.
171  *
172  * Returns 0 on success, else negative errno.
173  */
aemif_config_abus(struct platform_device * pdev,int csnum)174 static int aemif_config_abus(struct platform_device *pdev, int csnum)
175 {
176 	struct aemif_device *aemif = platform_get_drvdata(pdev);
177 	struct aemif_cs_data *data = &aemif->cs_data[csnum];
178 	int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
179 	unsigned long clk_rate = aemif->clk_rate;
180 	unsigned offset;
181 	u32 set, val;
182 
183 	offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;
184 
185 	ta	= aemif_calc_rate(pdev, data->ta, clk_rate, TA_MAX);
186 	rhold	= aemif_calc_rate(pdev, data->rhold, clk_rate, RHOLD_MAX);
187 	rstrobe	= aemif_calc_rate(pdev, data->rstrobe, clk_rate, RSTROBE_MAX);
188 	rsetup	= aemif_calc_rate(pdev, data->rsetup, clk_rate, RSETUP_MAX);
189 	whold	= aemif_calc_rate(pdev, data->whold, clk_rate, WHOLD_MAX);
190 	wstrobe	= aemif_calc_rate(pdev, data->wstrobe, clk_rate, WSTROBE_MAX);
191 	wsetup	= aemif_calc_rate(pdev, data->wsetup, clk_rate, WSETUP_MAX);
192 
193 	if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
194 	    whold < 0 || wstrobe < 0 || wsetup < 0) {
195 		dev_err(&pdev->dev, "%s: cannot get suitable timings\n",
196 			__func__);
197 		return -EINVAL;
198 	}
199 
200 	set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
201 		WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
202 
203 	set |= (data->asize & ACR_ASIZE_MASK);
204 	if (data->enable_ew)
205 		set |= ACR_EW_MASK;
206 	if (data->enable_ss)
207 		set |= ACR_SSTROBE_MASK;
208 
209 	val = readl(aemif->base + offset);
210 	val &= ~CONFIG_MASK;
211 	val |= set;
212 	writel(val, aemif->base + offset);
213 
214 	return 0;
215 }
216 
aemif_cycles_to_nsec(int val,unsigned long clk_rate)217 static inline int aemif_cycles_to_nsec(int val, unsigned long clk_rate)
218 {
219 	return ((val + 1) * NSEC_PER_MSEC) / clk_rate;
220 }
221 
222 /**
223  * aemif_get_hw_params - function to read hw register values
224  * @pdev: platform device to read for
225  * @csnum: aemif chip select number
226  *
227  * This function reads the defaults from the registers and update
228  * the timing values. Required for get/set commands and also for
229  * the case when driver needs to use defaults in hardware.
230  */
aemif_get_hw_params(struct platform_device * pdev,int csnum)231 static void aemif_get_hw_params(struct platform_device *pdev, int csnum)
232 {
233 	struct aemif_device *aemif = platform_get_drvdata(pdev);
234 	struct aemif_cs_data *data = &aemif->cs_data[csnum];
235 	unsigned long clk_rate = aemif->clk_rate;
236 	u32 val, offset;
237 
238 	offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;
239 	val = readl(aemif->base + offset);
240 
241 	data->ta = aemif_cycles_to_nsec(TA_VAL(val), clk_rate);
242 	data->rhold = aemif_cycles_to_nsec(RHOLD_VAL(val), clk_rate);
243 	data->rstrobe = aemif_cycles_to_nsec(RSTROBE_VAL(val), clk_rate);
244 	data->rsetup = aemif_cycles_to_nsec(RSETUP_VAL(val), clk_rate);
245 	data->whold = aemif_cycles_to_nsec(WHOLD_VAL(val), clk_rate);
246 	data->wstrobe = aemif_cycles_to_nsec(WSTROBE_VAL(val), clk_rate);
247 	data->wsetup = aemif_cycles_to_nsec(WSETUP_VAL(val), clk_rate);
248 	data->enable_ew = EW_VAL(val);
249 	data->enable_ss = SSTROBE_VAL(val);
250 	data->asize = val & ASIZE_MAX;
251 }
252 
253 /**
254  * of_aemif_parse_abus_config - parse CS configuration from DT
255  * @pdev: platform device to parse for
256  * @np: device node ptr
257  *
258  * This function update the emif async bus configuration based on the values
259  * configured in a cs device binding node.
260  */
of_aemif_parse_abus_config(struct platform_device * pdev,struct device_node * np)261 static int of_aemif_parse_abus_config(struct platform_device *pdev,
262 				      struct device_node *np)
263 {
264 	struct aemif_device *aemif = platform_get_drvdata(pdev);
265 	struct aemif_cs_data *data;
266 	u32 cs;
267 	u32 val;
268 
269 	if (of_property_read_u32(np, "ti,cs-chipselect", &cs)) {
270 		dev_dbg(&pdev->dev, "cs property is required");
271 		return -EINVAL;
272 	}
273 
274 	if (cs - aemif->cs_offset >= NUM_CS || cs < aemif->cs_offset) {
275 		dev_dbg(&pdev->dev, "cs number is incorrect %d", cs);
276 		return -EINVAL;
277 	}
278 
279 	if (aemif->num_cs >= NUM_CS) {
280 		dev_dbg(&pdev->dev, "cs count is more than %d", NUM_CS);
281 		return -EINVAL;
282 	}
283 
284 	data = &aemif->cs_data[aemif->num_cs];
285 	data->cs = cs;
286 
287 	/* read the current value in the hw register */
288 	aemif_get_hw_params(pdev, aemif->num_cs++);
289 
290 	/* override the values from device node */
291 	if (!of_property_read_u32(np, "ti,cs-min-turnaround-ns", &val))
292 		data->ta = val;
293 
294 	if (!of_property_read_u32(np, "ti,cs-read-hold-ns", &val))
295 		data->rhold = val;
296 
297 	if (!of_property_read_u32(np, "ti,cs-read-strobe-ns", &val))
298 		data->rstrobe = val;
299 
300 	if (!of_property_read_u32(np, "ti,cs-read-setup-ns", &val))
301 		data->rsetup = val;
302 
303 	if (!of_property_read_u32(np, "ti,cs-write-hold-ns", &val))
304 		data->whold = val;
305 
306 	if (!of_property_read_u32(np, "ti,cs-write-strobe-ns", &val))
307 		data->wstrobe = val;
308 
309 	if (!of_property_read_u32(np, "ti,cs-write-setup-ns", &val))
310 		data->wsetup = val;
311 
312 	if (!of_property_read_u32(np, "ti,cs-bus-width", &val))
313 		if (val == 16)
314 			data->asize = 1;
315 	data->enable_ew = of_property_read_bool(np, "ti,cs-extended-wait-mode");
316 	data->enable_ss = of_property_read_bool(np, "ti,cs-select-strobe-mode");
317 	return 0;
318 }
319 
320 static const struct of_device_id aemif_of_match[] = {
321 	{ .compatible = "ti,davinci-aemif", },
322 	{ .compatible = "ti,da850-aemif", },
323 	{},
324 };
325 MODULE_DEVICE_TABLE(of, aemif_of_match);
326 
aemif_probe(struct platform_device * pdev)327 static int aemif_probe(struct platform_device *pdev)
328 {
329 	int i;
330 	int ret = -ENODEV;
331 	struct device *dev = &pdev->dev;
332 	struct device_node *np = dev->of_node;
333 	struct device_node *child_np;
334 	struct aemif_device *aemif;
335 	struct aemif_platform_data *pdata;
336 	struct of_dev_auxdata *dev_lookup;
337 
338 	aemif = devm_kzalloc(dev, sizeof(*aemif), GFP_KERNEL);
339 	if (!aemif)
340 		return -ENOMEM;
341 
342 	pdata = dev_get_platdata(&pdev->dev);
343 	dev_lookup = pdata ? pdata->dev_lookup : NULL;
344 
345 	platform_set_drvdata(pdev, aemif);
346 
347 	aemif->clk = devm_clk_get(dev, NULL);
348 	if (IS_ERR(aemif->clk)) {
349 		dev_err(dev, "cannot get clock 'aemif'\n");
350 		return PTR_ERR(aemif->clk);
351 	}
352 
353 	ret = clk_prepare_enable(aemif->clk);
354 	if (ret)
355 		return ret;
356 
357 	aemif->clk_rate = clk_get_rate(aemif->clk) / MSEC_PER_SEC;
358 
359 	if (np && of_device_is_compatible(np, "ti,da850-aemif"))
360 		aemif->cs_offset = 2;
361 	else if (pdata)
362 		aemif->cs_offset = pdata->cs_offset;
363 
364 	aemif->base = devm_platform_ioremap_resource(pdev, 0);
365 	if (IS_ERR(aemif->base)) {
366 		ret = PTR_ERR(aemif->base);
367 		goto error;
368 	}
369 
370 	if (np) {
371 		/*
372 		 * For every controller device node, there is a cs device node
373 		 * that describe the bus configuration parameters. This
374 		 * functions iterate over these nodes and update the cs data
375 		 * array.
376 		 */
377 		for_each_available_child_of_node(np, child_np) {
378 			ret = of_aemif_parse_abus_config(pdev, child_np);
379 			if (ret < 0) {
380 				of_node_put(child_np);
381 				goto error;
382 			}
383 		}
384 	} else if (pdata && pdata->num_abus_data > 0) {
385 		for (i = 0; i < pdata->num_abus_data; i++, aemif->num_cs++) {
386 			aemif->cs_data[i].cs = pdata->abus_data[i].cs;
387 			aemif_get_hw_params(pdev, i);
388 		}
389 	}
390 
391 	for (i = 0; i < aemif->num_cs; i++) {
392 		ret = aemif_config_abus(pdev, i);
393 		if (ret < 0) {
394 			dev_err(dev, "Error configuring chip select %d\n",
395 				aemif->cs_data[i].cs);
396 			goto error;
397 		}
398 	}
399 
400 	/*
401 	 * Create a child devices explicitly from here to guarantee that the
402 	 * child will be probed after the AEMIF timing parameters are set.
403 	 */
404 	if (np) {
405 		for_each_available_child_of_node(np, child_np) {
406 			ret = of_platform_populate(child_np, NULL,
407 						   dev_lookup, dev);
408 			if (ret < 0) {
409 				of_node_put(child_np);
410 				goto error;
411 			}
412 		}
413 	} else if (pdata) {
414 		for (i = 0; i < pdata->num_sub_devices; i++) {
415 			pdata->sub_devices[i].dev.parent = dev;
416 			ret = platform_device_register(&pdata->sub_devices[i]);
417 			if (ret) {
418 				dev_warn(dev, "Error register sub device %s\n",
419 					 pdata->sub_devices[i].name);
420 			}
421 		}
422 	}
423 
424 	return 0;
425 error:
426 	clk_disable_unprepare(aemif->clk);
427 	return ret;
428 }
429 
aemif_remove(struct platform_device * pdev)430 static int aemif_remove(struct platform_device *pdev)
431 {
432 	struct aemif_device *aemif = platform_get_drvdata(pdev);
433 
434 	clk_disable_unprepare(aemif->clk);
435 	return 0;
436 }
437 
438 static struct platform_driver aemif_driver = {
439 	.probe = aemif_probe,
440 	.remove = aemif_remove,
441 	.driver = {
442 		.name = "ti-aemif",
443 		.of_match_table = of_match_ptr(aemif_of_match),
444 	},
445 };
446 
447 module_platform_driver(aemif_driver);
448 
449 MODULE_AUTHOR("Murali Karicheri <m-karicheri2@ti.com>");
450 MODULE_AUTHOR("Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>");
451 MODULE_DESCRIPTION("Texas Instruments AEMIF driver");
452 MODULE_LICENSE("GPL v2");
453 MODULE_ALIAS("platform:" KBUILD_MODNAME);
454