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/openbmc/linux/Documentation/devicetree/bindings/auxdisplay/
H A Dimg,ascii-lcd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/auxdisplay/img,ascii-lcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASCII LCD displays on Imagination Technologies boards
10 - Paul Burton <paulburton@kernel.org>
15 - img,boston-lcd
16 - mti,malta-lcd
17 - mti,sead3-lcd
25 Offset in bytes to the LCD registers within the system controller
[all …]
/openbmc/qemu/hw/mips/
H A Dboston.c2 * MIPS Boston development board emulation.
25 #include "hw/char/serial-mm.h"
27 #include "hw/ide/ahci-pci.h"
29 #include "hw/loader-fit.h"
32 #include "hw/pci-host/xilinx-pcie.h"
33 #include "hw/qdev-clock.h"
34 #include "hw/qdev-properties.h"
36 #include "qemu/error-report.h"
37 #include "qemu/guest-random.h"
49 #define TYPE_BOSTON "mips-boston"
[all …]
/openbmc/u-boot/board/imgtec/boston/
H A Dboston-lcd.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * lowlevel_display() - Display a message on Boston's LCD
13 * Display the string @msg on the 7 character LCD display of the Boston board.
H A Dcheckboard.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "boston-lcd.h"
12 #include "boston-regs.h"
18 lowlevel_display("U-boot "); in checkboard()
20 printf("Board: MIPS Boston\n"); in checkboard()
/openbmc/u-boot/arch/mips/dts/
H A Dimg,boston.dts1 /dts-v1/;
3 #include <dt-bindings/clock/boston-clock.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/interrupt-controller/mips-gic.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "img,boston";
14 stdout-path = &uart0;
18 #address-cells = <1>;
[all …]
/openbmc/linux/arch/mips/boot/dts/img/
H A Dboston.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/boston-clock.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/mips-gic.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 compatible = "img,boston";
15 stdout-path = "uart0:115200";
[all …]
/openbmc/linux/drivers/auxdisplay/
H A Dimg-ascii-lcd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "line-display.h"
22 * struct img_ascii_lcd_config - Configuration information about an LCD model
23 * @num_chars: the number of characters the LCD can display
25 * @update: function called to update the LCD
34 * struct img_ascii_lcd_ctx - Private data structure
35 * @base: the base address of the LCD registers
36 * @regmap: the regmap through which LCD registers are accessed
37 * @offset: the offset within regmap to the start of the LCD registers
38 * @cfg: pointer to the LCD model configuration
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # see Documentation/kbuild/kconfig-language.rst.
20 tristate "Character LCD core support" if COMPILE_TEST
22 This is the base system for character-based LCD displays.
25 This is some character LCD core interface that multiple drivers can
31 This is the core support for single-line character displays, to be
35 tristate "Common functions for HD44780 (and compatibles) LCD displays" if COMPILE_TEST
45 tristate "HD44780 Character LCD support"
50 The LCD is accessible through the /dev/lcd char device (10, 156).
56 tristate "KS0108 LCD Controller"
[all …]
/openbmc/u-boot/doc/
H A DREADME.boston1 MIPS Boston Development Board
3 ---------
5 ---------
7 The MIPS Boston development board is built around an FPGA & 3 PCIe controllers,
13 --------
15 --------
17 U-Boot can be run on a currently out-of-tree branch of QEMU with support for
18 the Boston board added. This QEMU code can currently be found in the "boston"
19 branch of git://git.linux-mips.org/pub/scm/paul/qemu.git and used like so:
21 $ git clone git://git.linux-mips.org/pub/scm/paul/qemu.git -b boston
[all …]
/openbmc/u-boot/include/configs/
H A Dmxs.h16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
32 #include <asm/arch/regs-base.h>
35 #include <asm/arch/iomux-mx23.h>
37 #include <asm/arch/iomux-mx28.h>
67 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
73 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
78 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
85 /* U-Boot general configuration */
122 /* LCD */
/openbmc/linux/drivers/video/fbdev/sis/
H A Dinitdef.h6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
23 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
56 #define IS_SIS330 (SiS_Pr->ChipType == SIS_330)
57 #define IS_SIS550 (SiS_Pr->ChipType == SIS_550)
58 #define IS_SIS650 (SiS_Pr->ChipType == SIS_650) /* All versions, incl 651, M65x */
59 #define IS_SIS740 (SiS_Pr->ChipType == SIS_740)
60 #define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
61 #define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
63 #define IS_SIS661 (SiS_Pr->ChipType == SIS_661)
64 #define IS_SIS741 (SiS_Pr->ChipType == SIS_741)
[all …]
H A Dvstruct.h6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
23 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
539 int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */
H A D310vtbl.h6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
23 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
59 {0x31,0x4a1b,0x0000,SIS_RI_720x480, 0x00,0x00,0x06,0x06,0x11,-1}, /* 720x480x8 */
60 {0x32,0x4a1b,0x0000,SIS_RI_720x576, 0x00,0x00,0x06,0x06,0x12,-1}, /* 720x576x8 */
61 {0x33,0x4a1d,0x0000,SIS_RI_720x480, 0x00,0x00,0x06,0x06,0x11,-1}, /* 720x480x16 */
62 {0x34,0x6a1d,0x0000,SIS_RI_720x576, 0x00,0x00,0x06,0x06,0x12,-1}, /* 720x576x16 */
63 {0x35,0x4a1f,0x0000,SIS_RI_720x480, 0x00,0x00,0x06,0x06,0x11,-1}, /* 720x480x32 */
64 {0x36,0x6a1f,0x0000,SIS_RI_720x576, 0x00,0x00,0x06,0x06,0x12,-1}, /* 720x576x32 */
97 {0x68,0x067b,0x013f,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x29,-1}, /* 1920x1440x8 */
98 {0x69,0x06fd,0x0140,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x29,-1}, /* 1920x1440x16 */
[all …]
H A Dinit301.c10 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
27 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
55 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
248 /* 661 et al LCD data structure (2.03.00) */
255 /* VESA non-VESA noscale */
420 if(SiS_Pr->ChipType == XGI_20) in SiS_UnLockCRT2()
422 else if(SiS_Pr->ChipType >= SIS_315H) in SiS_UnLockCRT2()
423 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2f,0x01); in SiS_UnLockCRT2()
425 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24,0x01); in SiS_UnLockCRT2()
432 if(SiS_Pr->ChipType == XGI_20) in SiS_LockCRT2()
[all …]
H A D300vtbl.h6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
23 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
55 {0x6a,0x2212,0x0102,SIS_RI_800x600, 0x00,0x00,0x00,0x00,0x00,-1}, /* 800x600x? */
56 {0x2e,0x0a1b,0x0101,SIS_RI_640x480, 0x00,0x00,0x00,0x00,0x08,-1},
57 {0x2f,0x021b,0x0100,SIS_RI_640x400, 0x00,0x00,0x00,0x00,0x10,-1}, /* 640x400x8 */
58 {0x30,0x2a1b,0x0103,SIS_RI_800x600, 0x00,0x00,0x00,0x00,0x00,-1},
59 {0x31,0x4a1b,0x0000,SIS_RI_720x480, 0x00,0x00,0x00,0x00,0x11,-1}, /* 720x480x8 */
60 {0x32,0x6a1b,0x0000,SIS_RI_720x576, 0x00,0x00,0x00,0x00,0x12,-1}, /* 720x576x8 */
61 {0x33,0x4a1d,0x0000,SIS_RI_720x480, 0x00,0x00,0x00,0x00,0x11,-1}, /* 720x480x16 */
62 {0x34,0x6a1d,0x0000,SIS_RI_720x576, 0x00,0x00,0x00,0x00,0x12,-1}, /* 720x576x16 */
[all …]
H A Dinit.c10 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
27 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
55 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
81 SiS_Pr->SiS_SModeIDTable = SiS_SModeIDTable; in InitCommonPointer()
82 SiS_Pr->SiS_StResInfo = SiS_StResInfo; in InitCommonPointer()
83 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo; in InitCommonPointer()
84 SiS_Pr->SiS_StandTable = SiS_StandTable; in InitCommonPointer()
86 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming; in InitCommonPointer()
87 SiS_Pr->SiS_PALTiming = SiS_PALTiming; in InitCommonPointer()
88 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing; in InitCommonPointer()
[all …]
/openbmc/u-boot/drivers/video/
H A Domap3_dss.c24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
41 writel(venc_cfg->status, &venc->status); in omap3_dss_venc_config()
42 writel(venc_cfg->f_control, &venc->f_control); in omap3_dss_venc_config()
43 writel(venc_cfg->vidout_ctrl, &venc->vidout_ctrl); in omap3_dss_venc_config()
44 writel(venc_cfg->sync_ctrl, &venc->sync_ctrl); in omap3_dss_venc_config()
45 writel(venc_cfg->llen, &venc->llen); in omap3_dss_venc_config()
46 writel(venc_cfg->flens, &venc->flens); in omap3_dss_venc_config()
47 writel(venc_cfg->hfltr_ctrl, &venc->hfltr_ctrl); in omap3_dss_venc_config()
48 writel(venc_cfg->cc_carr_wss_carr, &venc->cc_carr_wss_carr); in omap3_dss_venc_config()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-omap3/
H A Ddss.h24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
170 /* LCD display type */
216 #define DSS_HBP(bp) (((bp) - 1) << 20)
217 #define DSS_HFP(fp) (((fp) - 1) << 8)
218 #define DSS_HSW(sw) ((sw) - 1)
221 #define DSS_VSW(sw) ((sw) - 1)
225 #define PANEL_LCD_SIZE(xres, yres) ((yres - 1) << 16 | (xres - 1))
/openbmc/u-boot/arch/arm/dts/
H A Dimx6ul-opos6uldev.dts4 * This file is dual-licensed: you can use it either under the terms
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
48 /dts-v1/;
49 #include "imx6ul-opos6ul.dtsi"
56 stdout-path = &uart1;
60 compatible = "pwm-backlight";
62 brightness-levels = <0 4 8 16 32 64 128 255>;
63 default-brightness-level = <7>;
64 power-supply = <&reg_5v>;
[all …]
/openbmc/linux/include/uapi/video/
H A Dsisfb.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * sisfb.h - definitions for the SiS framebuffer driver
5 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria.
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
83 __u32 chip_id; /* PCI-ID of detected chip */
114 __u8 sisfb_lcdpdca; /* PanelDelayCompensation for LCD-via-CRT1 */
126 __u32 sisfb_vbflags2; /* ivideo->vbflags2 */
165 /* ioctl to enable/disable panning auto-maximize (like nomax parameter) */
191 /* ioctl to enable/disable panning auto-maximize (like nomax parameter) */
206 /* (for IN-KERNEL usage only) */
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-novena.dts2 * Copyright 2015 Sutajio Ko-Usagi PTE LTD
4 * This file is dual-licensed: you can use it either under the terms
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
49 /dts-v1/;
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
56 compatible = "kosagi,imx6q-novena", "fsl,imx6q";
65 stdout-path = &uart2;
69 compatible = "pwm-backlight";
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
[all …]
/openbmc/linux/drivers/usb/misc/sisusbvga/
H A Dsisusb_tables.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
7 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
24 * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
146 /* MD_3_400 - mode 0x03 - 400 */
180 {0x31, 0x4a1b, 0x0000, SIS_RI_720x480, 0x00, 0x00, 0x06, 0x06, 0x11, -1}, /* 720x480x8 */
181 {0x32, 0x4a1b, 0x0000, SIS_RI_720x576, 0x00, 0x00, 0x06, 0x06, 0x12, -1}, /* 720x576x8 */
182 {0x33, 0x4a1d, 0x0000, SIS_RI_720x480, 0x00, 0x00, 0x06, 0x06, 0x11, -1}, /* 720x480x16 */
183 {0x34, 0x6a1d, 0x0000, SIS_RI_720x576, 0x00, 0x00, 0x06, 0x06, 0x12, -1}, /* 720x576x16 */
184 {0x35, 0x4a1f, 0x0000, SIS_RI_720x480, 0x00, 0x00, 0x06, 0x06, 0x11, -1}, /* 720x480x32 */
185 {0x36, 0x6a1f, 0x0000, SIS_RI_720x576, 0x00, 0x00, 0x06, 0x06, 0x12, -1}, /* 720x576x32 */
[all …]
/openbmc/linux/
H A DCREDITS1 This is at least a partial credits-file of people that have
4 scripts. The fields are: name (N), email (E), web-address
6 snail-mail address (S).
10 ----------
51 D: in-kernel DRM Maintainer
71 E: tim_alpaerts@toyota-motor-europe.com
75 S: B-2610 Wilrijk-Antwerpen
80 W: http://www-stu.christs.cam.ac.uk/~aia21/
101 D: Maintainer of ide-cd and Uniform CD-ROM driver,
102 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
[all …]
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]

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