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Searched full:clk_peri_pwm1 (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,mt2712-pwm.yaml86 <&pericfg CLK_PERI_PWM0>, <&pericfg CLK_PERI_PWM1>,
/openbmc/linux/include/dt-bindings/clock/
H A Dmt8135-clk.h168 #define CLK_PERI_PWM1 30 macro
H A Dmediatek,mt6795-clk.h177 #define CLK_PERI_PWM1 2 macro
H A Dmt8173-clk.h196 #define CLK_PERI_PWM1 3 macro
H A Dmt2712-clk.h242 #define CLK_PERI_PWM1 3 macro
H A Dmt2701-clk.h224 #define CLK_PERI_PWM1 3 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c53 GATE_PERI0(CLK_PERI_PWM1, "peri_pwm1", "axi_sel", 2),
H A Dclk-mt6795-pericfg.c42 GATE_PERI(CLK_PERI_PWM1, "peri_pwm1", "axi_sel", 2),
H A Dclk-mt8135.c479 GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axi_sel", 2),
H A Dclk-mt2712.c888 GATE_PERI0(CLK_PERI_PWM1, "per_pwm1", "pwm_sel", 3),
H A Dclk-mt2701.c853 GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axisel_d4", 2),
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h217 #define CLK_PERI_PWM1 2 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c649 GATE_PERI0(CLK_PERI_PWM1, CLK_TOP_AXISEL_D4, 2),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi567 <&pericfg CLK_PERI_PWM1>,
H A Dmt2712e.dtsi485 <&pericfg CLK_PERI_PWM1>,
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623.dtsi425 <&pericfg CLK_PERI_PWM1>,