Home
last modified time | relevance | path

Searched defs:refdiv (Results 1 – 25 of 32) sorted by relevance

12

/openbmc/u-boot/arch/mips/mach-ath79/ar934x/
H A Dclk.c31 u8 refdiv; member
232 const u32 refdiv = (regval >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & in ar934x_cpupll_to_hz() local
247 const u32 refdiv = (regval >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & in ar934x_ddrpll_to_hz() local
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_s10.c175 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_main_vco_clk_hz() local
206 unsigned long fref, refdiv, mdiv, reg, vco; in cm_get_per_vco_clk_hz() local
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S19 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c78 u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0; in pll_para_config() local
241 u32 refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
H A Dclk_rk3036.c172 uint32_t refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
H A Dclk_rk322x.c173 uint32_t refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
H A Dclk_rk3399.c33 u32 refdiv; member
359 u32 ref_khz = OSC_HZ / KHz, refdiv, fbdiv = 0; in pll_para_config() local
H A Dclk_rv1108.c120 uint32_t refdiv, fbdiv, postdiv1, postdiv2; in rkclk_pll_get_rate() local
H A Dclk_rk3328.c21 u32 refdiv; member
/openbmc/linux/drivers/clk/visconti/
H A Dpll.h41 unsigned int refdiv; member
/openbmc/u-boot/arch/m68k/cpu/mcf532x/
H A Dspeed.c68 u32 refdiv = (1 << ((in_be32(&pll->pcr) & PLL_PCR_REFDIV(7)) >> 8)); in get_sys_clock() local
/openbmc/linux/drivers/clk/mmp/
H A Dclk-pll.c49 u32 fbdiv, refdiv, postdiv; in mmp_clk_pll_recalc_rate() local
/openbmc/linux/arch/mips/ath25/
H A Dar2315.c207 unsigned int pllc_out, refdiv, fdiv, divby2; in ar2315_sys_clk() local
/openbmc/linux/drivers/media/dvb-frontends/
H A Dcx24113.c85 u8 refdiv; member
281 static u8 cx24113_set_ref_div(struct cx24113_state *state, u8 refdiv) in cx24113_set_ref_div()
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S14 #define MK_PLL_CONF(divint, refdiv, range, outdiv) \ argument
/openbmc/linux/drivers/clk/socfpga/
H A Dclk-pll-s10.c87 unsigned long refdiv; in clk_pll_recalc_rate() local
/openbmc/linux/drivers/clk/
H A Dclk-axm5516.c52 unsigned long rate, fbdiv, refdiv, postdiv; in axxia_pllclk_recalc() local
/openbmc/linux/drivers/clk/pistachio/
H A Dclk.h97 unsigned long long refdiv; member
/openbmc/linux/drivers/clk/berlin/
H A Dberlin2-avpll.c159 u32 reg, refdiv, fbdiv; in berlin2_avpll_vco_recalc_rate() local
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3036.h61 u32 refdiv; member
H A Dcru_rk322x.h62 u32 refdiv; member
H A Dcru_rk3128.h64 u32 refdiv; member
H A Dcru_rv1108.h54 u32 refdiv; member
/openbmc/linux/sound/soc/codecs/
H A Darizona.c2099 int refdiv; member
2156 int refdiv, div; in arizona_calc_fratio() local
H A Dmadera.h152 int refdiv; member

12