| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rv1108.c | 29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
66 const struct pll_div *div) in rkclk_set_pll()
147 uint8_t div; in rv1108_mac_set_clk() local
172 u32 div; in rv1108_sfc_set_clk() local
191 u32 div, val; in rv1108_saradc_get_clk() local
216 u32 div, val; in rv1108_aclk_vio1_get_clk() local
242 u32 div, val; in rv1108_aclk_vio0_get_clk() local
277 u32 div, val; in rv1108_dclk_vop_get_clk() local
305 u32 div, val; in rv1108_aclk_bus_get_clk() local
333 u32 div, val; in rv1108_aclk_peri_get_clk() local
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| H A D | clk_rk3128.c | 27 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
39 const struct pll_div *div) in rkclk_set_pll()
76 static int pll_para_config(u32 freq_hz, struct pll_div *div) in pll_para_config()
282 uint div, mux; in rockchip_mmc_get_clk() local
348 u32 div, con; in rk3128_peri_get_pclk() local
393 u32 div, val; in rk3128_saradc_get_clk() local
457 u32 div, con, parent; in rk3128_vop_get_rate() local
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| H A D | clk_rk3368.c | 41 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
89 const struct pll_div *div) in rkclk_set_pll()
159 u32 div, con, con_id, rate; in rk3368_mmc_get_clk() local
222 u32 div = DIV_ROUND_UP(parent_rate, rate); in rk3368_mmc_find_best_rate_and_parent() local
254 u32 con_id, mux = 0, div = 0; in rk3368_mmc_set_clk() local
326 u8 div; in rk3368_gmac_set_clk() local
381 u32 div, val; in rk3368_spi_get_clk() local
429 u32 div, val; in rk3368_saradc_get_clk() local
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| H A D | clk_rk3328.c | 30 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
207 const struct pll_div *div) in rkclk_set_pll()
331 u32 div, con; in rk3328_i2c_get_clk() local
420 u8 div; in rk3328_gmac2io_set_clk() local
442 u32 div, con, con_id; in rk3328_mmc_get_clk() local
507 u32 div, con; in rk3328_pwm_get_clk() local
517 u32 div = GPLL_HZ / hz; in rk3328_pwm_set_clk() local
529 u32 div, val; in rk3328_saradc_get_clk() local
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| H A D | clk_rk3288.c | 131 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
145 const struct pll_div *div) in rkclk_set_pll()
227 static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div) in pll_para_config()
312 u8 div; in rockchip_mac_set_clk() local
574 uint div, mux; in rockchip_mmc_get_clk() local
657 uint div, mux; in rockchip_spi_get_clk() local
720 u32 div, val; in rockchip_saradc_get_clk() local
839 u32 div; in rk3288_clk_set_rate() local
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| H A D | clk_rk322x.c | 26 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
42 const struct pll_div *div) in rkclk_set_pll()
214 uint div, mux; in rockchip_mmc_get_clk() local
253 u8 div; in rk322x_mac_set_clk() local
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| H A D | clk_rk3036.c | 29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
45 const struct pll_div *div) in rkclk_set_pll()
214 uint div, mux; in rockchip_mmc_get_clk() local
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| /openbmc/u-boot/arch/arm/mach-s5pc1xx/ |
| H A D | clock.c | 137 unsigned long div; in s5pc110_get_arm_clk() local
157 unsigned long div; in s5pc100_get_arm_clk() local
180 uint div, d0_bus_ratio; in get_hclk() local
197 uint div, d1_bus_ratio, pclkd1_ratio; in get_pclkd1() local
218 unsigned int div; in get_hclk_sys() local
247 unsigned int div; in get_pclk_sys() local
323 void set_mmc_clk(int dev_index, unsigned int div) in set_mmc_clk()
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| /openbmc/u-boot/arch/arm/mach-at91/armv7/ |
| H A D | clock.c | 41 unsigned mul, div; in at91_pll_rate() local
194 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div) in at91_enable_periph_generated_clk()
260 u32 regval, clk_source, div; in at91_get_periph_generated_clk() local
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
| H A D | clock.c | 41 uint32_t clkctrl, clkseq, div; in mxs_get_pclk() local
73 uint32_t div; in mxs_get_hclk() local
91 uint32_t clkctrl, clkseq, div; in mxs_get_emiclk() local
122 uint32_t clkctrl, clkseq, div; in mxs_get_gpmiclk() local
148 uint32_t div; in mxs_set_ioclk() local
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mx25/ |
| H A D | generic.c | 73 ulong div; in imx_get_armclk() local
89 ulong div; in imx_get_ahbclk() local
107 ulong div; in imx_get_perclk() local
119 ulong div = (fref + freq - 1) / freq; in imx_set_perclk() local
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| /openbmc/u-boot/drivers/adc/ |
| H A D | stm32-adc-core.c | 35 int div; member
63 int i, div; in stm32h7_adc_clk_sel() local
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| /openbmc/u-boot/arch/arm/mach-imx/mx7/ |
| H A D | clock_slice.c | 520 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div) in clock_set_postdiv()
548 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div) in clock_get_postdiv()
572 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div, in clock_set_autopostdiv()
610 int clock_get_autopostdiv(enum clk_root_index clock_id, enum root_auto_div *div, in clock_get_autopostdiv()
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| /openbmc/u-boot/arch/arm/mach-davinci/ |
| H A D | cpu.c | 117 u32 div; in pll_div() local
148 static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div) in pll_sysclk_mhz()
178 unsigned int davinci_clk_get(unsigned int div) in davinci_clk_get()
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| /openbmc/u-boot/drivers/clk/mvebu/ |
| H A D | armada-37xx-tbg.c | 57 unsigned int div[NUM_TBG]; member
72 unsigned int div; in tbg_get_div() local
127 unsigned int mult, div; in armada_37xx_tbg_clk_probe() local
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| /openbmc/u-boot/arch/arm/mach-exynos/ |
| H A D | clock.c | 116 unsigned int div; in exynos_get_pll_clk() local
368 unsigned int src = 0, div = 0, sub_div = 0; in exynos5_get_periph_rate() local
467 unsigned int src = 0, div = 0, sub_div = 0; in exynos542x_get_periph_rate() local
573 unsigned long div; in exynos4_get_arm_clk() local
595 unsigned long div; in exynos4x12_get_arm_clk() local
617 unsigned long div; in exynos5_get_arm_clk() local
833 static void exynos4_set_mmc_clk(int dev_index, unsigned int div) in exynos4_set_mmc_clk()
868 static void exynos5_set_mmc_clk(int dev_index, unsigned int div) in exynos5_set_mmc_clk()
892 static void exynos5420_set_mmc_clk(int dev_index, unsigned int div) in exynos5420_set_mmc_clk()
1359 unsigned int div; in exynos5_set_i2s_clk_prescaler() local
[all …]
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| /openbmc/u-boot/arch/arm/mach-at91/arm920t/ |
| H A D | clock.c | 43 unsigned i, div = 0, mul = 0, diff = 1 << 30; in at91_pll_calc() local
92 unsigned mul, div; in at91_pll_rate() local
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| /openbmc/u-boot/arch/arm/cpu/armv7/s5p-common/ |
| H A D | pwm.c | 44 unsigned int div; in pwm_calc_tin() local
114 int pwm_init(int pwm_id, int div, int invert) in pwm_init()
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| /openbmc/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | pcc.c | 160 int pcc_clock_div_config(enum pcc_clk clk, bool frac, u8 div) in pcc_clock_div_config()
255 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
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| /openbmc/u-boot/board/toradex/colibri_vf/ |
| H A D | dcu.c | 17 unsigned long long div; in dcu_set_pixel_clock() local
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| /openbmc/u-boot/board/freescale/ls1021atwr/ |
| H A D | dcu.c | 17 unsigned long long div; in dcu_set_pixel_clock() local
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| /openbmc/u-boot/board/freescale/ls1021aiot/ |
| H A D | dcu.c | 17 unsigned long long div; in dcu_set_pixel_clock() local
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| /openbmc/u-boot/arch/arm/mach-at91/arm926ejs/ |
| H A D | clock.c | 43 unsigned i, div = 0, mul = 0, diff = 1 << 30; in at91_pll_calc() local
100 unsigned mul, div; in at91_pll_rate() local
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| /openbmc/u-boot/drivers/power/ |
| H A D | sy8106a.c | 15 static u8 sy8106a_mvolt_to_cfg(int mvolt, int min, int max, int div) in sy8106a_mvolt_to_cfg()
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| /openbmc/u-boot/drivers/video/sunxi/ |
| H A D | sunxi_dw_hdmi.c | 139 int div = sunxi_dw_hdmi_get_divider(clock); in sunxi_dw_hdmi_phy_set() local
212 int value, n, m, div, diff; in sunxi_dw_hdmi_pll_set() local
257 int div = clock_get_pll3() / edid->pixelclock.typ; in sunxi_dw_hdmi_lcdc_init() local
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