| /openbmc/u-boot/arch/arm/include/asm/arch-rockchip/ |
| H A D | hardware.h | 9 #define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set)) argument
11 #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) argument
15 #define rk_clrsetreg(addr, clr, set) \ argument
17 #define rk_clrreg(addr, clr) writel((clr) << 16, addr) argument
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| /openbmc/u-boot/arch/x86/include/asm/arch-quark/ |
| H A D | msg_port.h | 108 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
113 #define msg_port_clrbits(port, reg, clr) \ argument
117 #define msg_port_clrsetbits(port, reg, clr, set) \ argument
120 #define msg_port_alt_clrbits(port, reg, clr) \ argument
124 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ argument
127 #define msg_port_io_clrbits(port, reg, clr) \ argument
131 #define msg_port_io_clrsetbits(port, reg, clr, set) \ argument
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| /openbmc/u-boot/common/ |
| H A D | lcd_console_rotation.c | 31 static inline void console_setrow90(struct console_t *pcons, u32 row, int clr) in console_setrow90()
86 static inline void console_setrow180(struct console_t *pcons, u32 row, int clr) in console_setrow180()
133 static inline void console_setrow270(struct console_t *pcons, u32 row, int clr) in console_setrow270()
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| H A D | lcd_console.c | 63 static inline void console_setrow0(struct console_t *pcons, u32 row, int clr) in console_setrow0()
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| /openbmc/u-boot/drivers/pinctrl/aspeed/ |
| H A D | pinctrl-aspeed.h | 4 int clr; member
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| /openbmc/u-boot/drivers/video/ |
| H A D | console_rotate.c | 14 static int console_set_row_1(struct udevice *dev, uint row, int clr) in console_set_row_1()
146 static int console_set_row_2(struct udevice *dev, uint row, int clr) in console_set_row_2()
273 static int console_set_row_3(struct udevice *dev, uint row, int clr) in console_set_row_3()
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| H A D | console_normal.c | 16 static int console_normal_set_row(struct udevice *dev, uint row, int clr) in console_normal_set_row()
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| H A D | console_truetype.c | 124 static int console_truetype_set_row(struct udevice *dev, uint row, int clr) in console_truetype_set_row()
317 int xend, int yend, int clr) in console_truetype_erase()
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| H A D | vidconsole-uclass.c | 50 int vidconsole_set_row(struct udevice *dev, uint row, int clr) in vidconsole_set_row()
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| /openbmc/u-boot/arch/mips/mach-pic32/include/mach/ |
| H A D | pic32.h | 61 u32 clr; member
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| /openbmc/u-boot/drivers/misc/ |
| H A D | smsc_sio1007.c | 24 static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set) in sio1007_clrsetbits()
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| /openbmc/u-boot/board/samsung/odroid/ |
| H A D | odroid.c | 103 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local
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| /openbmc/qemu/hw/riscv/ |
| H A D | riscv-iommu.h | 120 unsigned idx, uint32_t set, uint32_t clr) in riscv_iommu_reg_mod32()
139 uint64_t set, uint64_t clr) in riscv_iommu_reg_mod64()
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| /openbmc/u-boot/drivers/power/pmic/ |
| H A D | pmic-uclass.c | 167 int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set) in pmic_clrsetbits()
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| /openbmc/u-boot/drivers/sound/ |
| H A D | rockchip_i2s.c | 25 u32 clr; /* I2S_CLR, 0x20 */ member
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| /openbmc/u-boot/drivers/net/ |
| H A D | mtk_eth.c | 188 static void mtk_pdma_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr, in mtk_pdma_rmw()
217 static void mtk_gmac_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr, u32 set) in mtk_gmac_rmw()
222 static void mtk_ethsys_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr, in mtk_ethsys_rmw()
463 static void mt7530_reg_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr, in mt7530_reg_rmw()
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| /openbmc/u-boot/drivers/power/regulator/ |
| H A D | tps65910_regulator.c | 268 uint clr, set; in tps65910_set_enable() local
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| /openbmc/u-boot/drivers/pci/ |
| H A D | pci-uclass.c | 271 u32 clr, u32 set) in pci_bus_clrset_config32()
452 int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set) in dm_pci_clrset_config8()
466 int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set) in dm_pci_clrset_config16()
480 int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set) in dm_pci_clrset_config32()
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| /openbmc/u-boot/drivers/spi/ |
| H A D | bcm63xx_hsspi.c | 142 uint32_t clr, set; in bcm63xx_hsspi_activate_cs() local
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| /openbmc/u-boot/cmd/aspeed/nettest/ |
| H A D | phy.c | 251 uint32_t clr = GENMASK(14, 10) | BIT(6); in phy_basic_setting() local
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| /openbmc/phosphor-host-ipmid/ |
| H A D | storagehandler.cpp | 475 clearSEL(uint16_t reservationID, const std::array<char, 3>& clr, in clearSEL() argument
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| /openbmc/u-boot/include/faraday/ |
| H A D | ftsdc010.h | 27 unsigned int clr; /* 0x2c - clear reg */ member
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| /openbmc/fb-ipmi-oem/src/ |
| H A D | selcommands.cpp | 1669 const std::array<uint8_t, 3>& clr, in ipmiStorageClearSEL()
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| /openbmc/phosphor-host-ipmid/dbus-sdr/ |
| H A D | storagecommands.cpp | 1152 ipmiStorageClearSEL(ipmi::Context::ptr ctx,uint16_t reservationID,const std::array<uint8_t,3> & clr,uint8_t eraseOperation) ipmiStorageClearSEL() argument
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| /openbmc/intel-ipmi-oem/src/ |
| H A D | storagecommands.cpp | 1092 const std::array<uint8_t, 3>& clr, uint8_t eraseOperation) in ipmiStorageClearSEL()
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