| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt8173-apmixedsys.c | 24 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
44 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| H A D | clk-mt8183-apmixedsys.c | 54 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
81 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| H A D | clk-mt8173-topckgen.c | 22 #define TOP_MUX_GATE_NOSR(_id, _name, _parents, _reg, _shift, _width, _gate, _flags) \ argument
27 #define TOP_MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate, _flags) \ argument
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| H A D | clk-mt8192-apmixedsys.c | 35 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
63 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
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| H A D | clk-mt8195-apusys_pll.c | 28 #define PLL(_id, _name, _reg, _pwr_reg, _pd_reg, _pcw_reg) { \ argument
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| H A D | clk-mt8135-apmixedsys.c | 20 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
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| H A D | clk-mt7629.c | 23 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
44 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
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| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-max77650.c | 29 #define MAX77650_GPIO_DIR_BITS(_reg) \ argument
31 #define MAX77650_GPIO_INVAL_BITS(_reg) \ argument
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| /openbmc/linux/sound/soc/mediatek/mt8188/ |
| H A D | mt8188-audsys-clk.c | 28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument
38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
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| /openbmc/linux/sound/soc/mediatek/mt8195/ |
| H A D | mt8195-audsys-clk.c | 28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument
38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
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| /openbmc/u-boot/drivers/reset/ |
| H A D | reset-uniphier.c | 27 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
34 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
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| /openbmc/linux/drivers/clk/sunxi-ng/ |
| H A D | ccu_phase.h | 20 #define SUNXI_CCU_PHASE(_struct, _name, _parent, _reg, _shift, _width, _flags) \ argument
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| H A D | ccu_sdm.h | 42 _reg, _reg_enable) \ argument
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| H A D | ccu_nk.h | 33 #define SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(_struct, _name, _parent, _reg, \ argument
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| /openbmc/linux/drivers/gpu/drm/i915/ |
| H A D | i915_cmd_parser.c | 581 #define REG32(_reg, ...) \ argument
584 #define REG32_IDX(_reg, idx) \ argument
594 #define REG64(_reg) \ argument
598 #define REG64_IDX(_reg, idx) \ argument
602 #define REG64_BASE_IDX(_reg, base, idx) \ argument
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| /openbmc/linux/drivers/net/wireless/ath/ |
| H A D | hw.c | 24 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) argument
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mtk.h | 113 #define MUX_GATE_FLAGS(_id, _parents, _reg, _shift, _width, _gate, \ argument
126 #define MUX_GATE(_id, _parents, _reg, _shift, _width, _gate) \ argument
129 #define MUX(_id, _parents, _reg, _shift, _width) { \ argument
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| /openbmc/linux/drivers/gpu/drm/i915/gvt/ |
| H A D | reg.h | 79 #define REG_50080_TO_PIPE(_reg) ({ \ argument
86 #define REG_50080_TO_PLANE(_reg) ({ \ argument
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| /openbmc/linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | clock-sh7366.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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| H A D | clock-sh7343.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-madera.c | 22 #define MADERA_IRQ(_irq, _reg) \ argument
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| /openbmc/linux/drivers/reset/ |
| H A D | reset-uniphier.c | 27 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
34 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
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| /openbmc/qemu/hw/vfio/ |
| H A D | display.c | 29 #define pread_field(_fd, _reg, _ptr, _fld) \ argument
34 #define pwrite_field(_fd, _reg, _ptr, _fld) \ argument
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| /openbmc/linux/drivers/clk/mvebu/ |
| H A D | armada-37xx-periph.c | 159 #define PERIPH_DIV(_name, _reg, _shift, _table) \ argument
169 #define PERIPH_PM_CPU(_name, _shift1, _reg, _shift2) \ argument
186 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
191 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
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| /openbmc/linux/arch/powerpc/kernel/ptrace/ |
| H A D | ptrace.c | 386 #define CHECK_REG(_pt, _reg) \ in pt_regs_check() argument
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