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Searched refs:write_msk (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/hw/cxl/
H A Dcxl-component-utils.c211 static void ras_init_common(uint32_t *reg_state, uint32_t *write_msk) in ras_init_common() argument
218 stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_STATUS, 0x1cfff); in ras_init_common()
221 stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff); in ras_init_common()
223 stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff); in ras_init_common()
225 stl_le_p(write_msk + R_CXL_RAS_COR_ERR_STATUS, 0x7f); in ras_init_common()
227 stl_le_p(write_msk + R_CXL_RAS_COR_ERR_MASK, 0x7f); in ras_init_common()
232 static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk, in hdm_init_common() argument
261 write_msk[R_CXL_HDM_DECODER_GLOBAL_CONTROL] = 0x3; in hdm_init_common()
263 write_msk[R_CXL_HDM_DECODER0_BASE_LO + i * hdm_inc] = 0xf0000000; in hdm_init_common()
264 write_msk[R_CXL_HDM_DECODER0_BASE_HI + i * hdm_inc] = 0xffffffff; in hdm_init_common()
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/openbmc/qemu/hw/pci-bridge/
H A Dcxl_downstream.c39 uint32_t *write_msk = dsp->cxl_cstate.crb.cache_mem_regs_write_mask; in latch_registers() local
41 cxl_component_register_init_common(reg_state, write_msk, in latch_registers()
H A Dcxl_root_port.c102 uint32_t *write_msk = crp->cxl_cstate.crb.cache_mem_regs_write_mask; in latch_registers() local
104 cxl_component_register_init_common(reg_state, write_msk, CXL2_ROOT_PORT); in latch_registers()
H A Dcxl_upstream.c90 uint32_t *write_msk = usp->cxl_cstate.crb.cache_mem_regs_write_mask; in latch_registers() local
92 cxl_component_register_init_common(reg_state, write_msk, in latch_registers()
/openbmc/qemu/include/hw/cxl/
H A Dcxl_component.h257 uint32_t *write_msk,