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Searched refs:vaddr (Results 1 – 25 of 269) sorted by relevance

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/openbmc/qemu/include/user/
H A Dpage-protection.h20 int page_get_flags(vaddr address);
33 void page_set_flags(vaddr start, vaddr last, int flags);
35 void page_reset_target_data(vaddr start, vaddr last);
47 bool page_check_range(vaddr start, vaddr last, int flags);
59 bool page_check_range_empty(vaddr start, vaddr last);
73 vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align);
89 void *page_get_target_data(vaddr address, size_t size);
91 typedef int (*walk_memory_regions_fn)(void *, vaddr, vaddr, int);
H A Dguest-host.h32 static inline vaddr cpu_untagged_addr(CPUState *cs, vaddr x) in cpu_untagged_addr()
42 static inline void *g2h_untagged(vaddr x) in g2h_untagged()
47 static inline void *g2h(CPUState *cs, vaddr x) in g2h()
52 static inline bool guest_addr_valid_untagged(vaddr x) in guest_addr_valid_untagged()
57 static inline bool guest_range_valid_untagged(vaddr start, vaddr len) in guest_range_valid_untagged()
67 (vaddr)__ret; \
/openbmc/qemu/include/accel/tcg/
H A Dcpu-ops.h63 int *max_insns, vaddr pc, void *host_pc);
134 void (*record_sigsegv)(CPUState *cpu, vaddr addr,
158 void (*record_sigbus)(CPUState *cpu, vaddr addr,
166 vaddr (*untagged_addr)(CPUState *cs, vaddr addr);
212 bool (*tlb_fill_align)(CPUState *cpu, CPUTLBEntryFull *out, vaddr addr,
222 bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
231 vaddr (*pointer_wrap)(CPUState *cpu, int mmu_idx, vaddr result, vaddr base);
236 void (*do_transaction_failed)(CPUState *cpu, hwaddr physaddr, vaddr addr,
244 G_NORETURN void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
251 vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
[all …]
H A Dcpu-ldst-common.h19 uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
20 uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
21 uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
22 uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
23 Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra);
25 void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val,
27 void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val,
29 void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val,
31 void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val,
33 void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
[all …]
H A Dprobe.h30 void *probe_access(CPUArchState *env, vaddr addr, int size,
33 static inline void *probe_write(CPUArchState *env, vaddr addr, int size, in probe_write()
39 static inline void *probe_read(CPUArchState *env, vaddr addr, int size, in probe_read()
64 int probe_access_flags(CPUArchState *env, vaddr addr, int size,
85 int probe_access_full(CPUArchState *env, vaddr addr, int size,
100 int probe_access_full_mmu(CPUArchState *env, vaddr addr, int size,
119 void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr,
/openbmc/qemu/include/exec/
H A Dcputlb.h57 void tlb_set_page_full(CPUState *cpu, int mmu_idx, vaddr addr,
82 void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
84 int prot, int mmu_idx, vaddr size);
93 void tlb_set_page(CPUState *cpu, vaddr addr,
95 int mmu_idx, vaddr size);
106 void tlb_flush_page(CPUState *cpu, vaddr addr);
119 void tlb_flush_page_all_cpus_synced(CPUState *src, vaddr addr);
152 void tlb_flush_page_by_mmuidx(CPUState *cpu, vaddr addr,
167 void tlb_flush_page_by_mmuidx_all_cpus_synced(CPUState *cpu, vaddr addr,
203 void tlb_flush_page_bits_by_mmuidx(CPUState *cpu, vaddr addr,
[all …]
H A Dtranslator.h69 vaddr pc_first;
70 vaddr pc_next;
149 vaddr pc, void *host_pc, const TranslatorOps *ops,
160 bool translator_use_goto_tb(DisasContextBase *db, vaddr dest);
183 uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc);
185 vaddr pc, MemOp endian);
187 vaddr pc, MemOp endian);
189 vaddr pc, MemOp endian);
193 translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc) in translator_lduw()
199 translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc) in translator_ldl()
[all …]
H A Dwatchpoint.h12 static inline int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, in cpu_watchpoint_insert()
18 static inline int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, in cpu_watchpoint_remove()
19 vaddr len, int flags) in cpu_watchpoint_remove()
33 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len,
35 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr,
36 vaddr len, int flags);
H A Dbreakpoint.h16 vaddr pc;
22 vaddr vaddr; member
23 vaddr len;
24 vaddr hitaddr;
/openbmc/qemu/target/i386/tcg/
H A Daccess.h9 target_ulong vaddr; member
25 vaddr vaddr, unsigned size,
27 void access_prepare(X86Access *ret, CPUX86State *env, vaddr vaddr,
30 uint8_t access_ldb(X86Access *ac, vaddr addr);
31 uint16_t access_ldw(X86Access *ac, vaddr addr);
32 uint32_t access_ldl(X86Access *ac, vaddr addr);
33 uint64_t access_ldq(X86Access *ac, vaddr addr);
35 void access_stb(X86Access *ac, vaddr addr, uint8_t val);
36 void access_stw(X86Access *ac, vaddr addr, uint16_t val);
37 void access_stl(X86Access *ac, vaddr addr, uint32_t val);
[all …]
H A Daccess.c13 vaddr vaddr, unsigned size, in access_prepare_mmu() argument
21 size1 = MIN(size, -(vaddr | TARGET_PAGE_MASK)), in access_prepare_mmu()
25 ret->vaddr = vaddr; in access_prepare_mmu()
32 haddr1 = probe_access(env, vaddr, size1, type, mmu_idx, ra); in access_prepare_mmu()
36 haddr2 = probe_access(env, vaddr + size1, size2, type, mmu_idx, ra); in access_prepare_mmu()
49 void access_prepare(X86Access *ret, CPUX86State *env, vaddr vaddr, in access_prepare() argument
53 access_prepare_mmu(ret, env, vaddr, size, type, mmu_idx, ra); in access_prepare()
56 static void *access_ptr(X86Access *ac, vaddr addr, unsigned len) in access_ptr()
58 vaddr offset = addr - ac->vaddr; in access_ptr()
60 assert(addr >= ac->vaddr); in access_ptr()
[all …]
H A Dhelper-tcg.h62 int *max_insns, vaddr pc, void *host_pc);
73 G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr,
77 void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,
80 void x86_cpu_record_sigbus(CPUState *cs, vaddr addr,
83 bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
86 G_NORETURN void x86_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
/openbmc/qemu/target/s390x/
H A Dmmu_helper.c126 static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, in mmu_translate_asce() argument
142 *raddr = vaddr; in mmu_translate_asce()
148 if (VADDR_REGION1_TL(vaddr) > asce_tl) { in mmu_translate_asce()
151 gaddr += VADDR_REGION1_TX(vaddr) * 8; in mmu_translate_asce()
154 if (VADDR_REGION1_TX(vaddr)) { in mmu_translate_asce()
157 if (VADDR_REGION2_TL(vaddr) > asce_tl) { in mmu_translate_asce()
160 gaddr += VADDR_REGION2_TX(vaddr) * 8; in mmu_translate_asce()
163 if (VADDR_REGION1_TX(vaddr) || VADDR_REGION2_TX(vaddr)) { in mmu_translate_asce()
166 if (VADDR_REGION3_TL(vaddr) > asce_tl) { in mmu_translate_asce()
169 gaddr += VADDR_REGION3_TX(vaddr) * 8; in mmu_translate_asce()
[all …]
/openbmc/qemu/accel/tcg/
H A Dwatchpoint.c39 vaddr addr, vaddr len) in watchpoint_address_matches()
47 vaddr wpend = wp->vaddr + wp->len - 1; in watchpoint_address_matches()
48 vaddr addrend = addr + len - 1; in watchpoint_address_matches()
50 return !(addr > wpend || wp->vaddr > addrend); in watchpoint_address_matches()
54 int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len) in cpu_watchpoint_address_matches()
68 void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, in cpu_check_watchpoint()
116 wp->hitaddr = MAX(addr, wp->vaddr); in cpu_check_watchpoint()
H A Duser-exec.c129 uintptr_t host_pc, vaddr guest_addr) in handle_sigsegv_accerr_write()
165 static PageFlagsNode *pageflags_find(vaddr start, vaddr last) in pageflags_find()
173 static PageFlagsNode *pageflags_next(PageFlagsNode *p, vaddr start, vaddr last) in pageflags_next()
202 static int dump_region(void *opaque, vaddr start, vaddr end, int prot) in dump_region()
234 int page_get_flags(vaddr address) in page_get_flags()
257 static void pageflags_create(vaddr start, vaddr last, int flags) in pageflags_create()
268 static bool pageflags_unset(vaddr start, vaddr last) in pageflags_unset()
274 vaddr p_last; in pageflags_unset()
313 static void pageflags_create_merge(vaddr start, vaddr last, int flags) in pageflags_create_merge()
364 static bool pageflags_set_clear(vaddr start, vaddr last, in pageflags_set_clear()
[all …]
H A Dtb-hash.h39 static inline unsigned int tb_jmp_cache_hash_page(vaddr pc) in tb_jmp_cache_hash_page()
41 vaddr tmp; in tb_jmp_cache_hash_page()
46 static inline unsigned int tb_jmp_cache_hash_func(vaddr pc) in tb_jmp_cache_hash_func()
48 vaddr tmp; in tb_jmp_cache_hash_func()
57 static inline unsigned int tb_jmp_cache_hash_func(vaddr pc) in tb_jmp_cache_hash_func()
65 uint32_t tb_hash_func(tb_page_addr_t phys_pc, vaddr pc, in tb_hash_func()
H A Dcputlb.c90 QEMU_BUILD_BUG_ON(sizeof(vaddr) > sizeof(run_on_cpu_data));
130 vaddr addr) in tlb_index()
139 vaddr addr) in tlb_entry()
151 static void tb_jmp_cache_clear_page(CPUState *cpu, vaddr page_addr) in tb_jmp_cache_clear_page()
441 vaddr page, vaddr mask) in tlb_hit_page_mask_anyprot()
451 static inline bool tlb_hit_page_anyprot(CPUTLBEntry *tlb_entry, vaddr page) in tlb_hit_page_anyprot()
467 vaddr page, in tlb_flush_entry_mask_locked()
468 vaddr mask) in tlb_flush_entry_mask_locked()
477 static inline bool tlb_flush_entry_locked(CPUTLBEntry *tlb_entry, vaddr page) in tlb_flush_entry_locked()
484 vaddr page, in tlb_flush_vtlb_page_mask_locked()
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/openbmc/u-boot/lib/
H A Daddr_map.c12 unsigned long vaddr; member
15 phys_addr_t addrmap_virt_to_phys(void * vaddr) in addrmap_virt_to_phys() argument
25 addr = (u64)((u32)vaddr); in addrmap_virt_to_phys()
26 base = (u64)(address_map[i].vaddr); in addrmap_virt_to_phys()
30 return addr - address_map[i].vaddr + address_map[i].paddr; in addrmap_virt_to_phys()
53 offset = address_map[i].paddr - address_map[i].vaddr; in addrmap_phys_to_virt()
62 void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, in addrmap_set_entry() argument
68 address_map[idx].vaddr = vaddr; in addrmap_set_entry()
/openbmc/qemu/system/
H A Dwatchpoint.c28 int cpu_watchpoint_insert(CPUState *cpu, vaddr addr, vaddr len, in cpu_watchpoint_insert()
32 vaddr in_page; in cpu_watchpoint_insert()
42 wp->vaddr = addr; in cpu_watchpoint_insert()
67 int cpu_watchpoint_remove(CPUState *cpu, vaddr addr, vaddr len, in cpu_watchpoint_remove()
73 if (addr == wp->vaddr && len == wp->len in cpu_watchpoint_remove()
87 tlb_flush_page(cpu, watchpoint->vaddr); in cpu_watchpoint_remove_by_ref()
/openbmc/qemu/target/arm/
H A Dhyp_gdbstub.c57 int insert_hw_breakpoint(vaddr addr) in insert_hw_breakpoint()
83 int delete_hw_breakpoint(vaddr pc) in delete_hw_breakpoint()
128 int insert_hw_watchpoint(vaddr addr, vaddr len, int type) in insert_hw_watchpoint()
133 .details = { .vaddr = addr, .len = len } in insert_hw_watchpoint()
185 bool check_watchpoint_in_range(int i, vaddr addr) in check_watchpoint_in_range()
217 int delete_hw_watchpoint(vaddr addr, vaddr len, int type) in delete_hw_watchpoint()
229 bool find_hw_breakpoint(CPUState *cpu, vaddr pc) in find_hw_breakpoint()
242 CPUWatchpoint *find_hw_watchpoint(CPUState *cpu, vaddr addr) in find_hw_watchpoint()
/openbmc/qemu/target/xtensa/
H A Dmmu_helper.c67 void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr) in HELPER()
73 probe_access(env, vaddr, 1, MMU_INST_FETCH, in HELPER()
284 entry->vaddr = vpn; in xtensa_tlb_set_entry_mmu()
300 tlb_flush_page(cs, entry->vaddr); in xtensa_tlb_set_entry()
303 tlb_flush_page(cs, entry->vaddr); in xtensa_tlb_set_entry()
310 tlb_flush_page(cs, entry->vaddr); in xtensa_tlb_set_entry()
319 hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) in xtensa_cpu_get_phys_page_debug()
358 .vaddr = 0xd0000000, in reset_tlb_mmu_ways56()
364 .vaddr = 0xd8000000, in reset_tlb_mmu_ways56()
373 .vaddr = 0xe0000000, in reset_tlb_mmu_ways56()
[all …]
H A Dop_helper.c80 void HELPER(check_atomctl)(CPUXtensaState *env, uint32_t pc, uint32_t vaddr) in HELPER()
84 int rc = xtensa_get_physical_addr(env, true, vaddr, 1, in HELPER()
97 HELPER(exception_cause_vaddr)(env, pc, rc, vaddr); in HELPER()
119 LOAD_STORE_ERROR_CAUSE, vaddr); in HELPER()
125 LOAD_STORE_ERROR_CAUSE, vaddr); in HELPER()
133 void HELPER(check_exclusive)(CPUXtensaState *env, uint32_t pc, uint32_t vaddr, in HELPER()
138 int rc = xtensa_get_physical_addr(env, true, vaddr, is_write, in HELPER()
143 HELPER(exception_cause_vaddr)(env, pc, rc, vaddr); in HELPER()
161 EXCLUSIVE_ERROR_CAUSE, vaddr); in HELPER()
167 LOAD_STORE_ERROR_CAUSE, vaddr); in HELPER()
/openbmc/qemu/include/system/
H A Dhvf_int.h83 vaddr pc;
84 vaddr saved_insn;
90 vaddr pc);
95 int hvf_arch_insert_hw_breakpoint(vaddr addr, vaddr len, int type);
96 int hvf_arch_remove_hw_breakpoint(vaddr addr, vaddr len, int type);
/openbmc/qemu/target/hexagon/
H A Dgenptr.h27 void gen_store32(TCGv vaddr, TCGv src, int width, uint32_t slot);
28 void gen_store1(TCGv_env cpu_env, TCGv vaddr, TCGv src, uint32_t slot);
29 void gen_store2(TCGv_env cpu_env, TCGv vaddr, TCGv src, uint32_t slot);
30 void gen_store4(TCGv_env cpu_env, TCGv vaddr, TCGv src, uint32_t slot);
31 void gen_store8(TCGv_env cpu_env, TCGv vaddr, TCGv_i64 src, uint32_t slot);
32 void gen_store1i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot);
33 void gen_store2i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot);
34 void gen_store4i(TCGv_env cpu_env, TCGv vaddr, int32_t src, uint32_t slot);
35 void gen_store8i(TCGv_env cpu_env, TCGv vaddr, int64_t src, uint32_t slot);
/openbmc/qemu/accel/kvm/
H A Dkvm-cpus.h20 int kvm_insert_breakpoint(CPUState *cpu, int type, vaddr addr, vaddr len);
21 int kvm_remove_breakpoint(CPUState *cpu, int type, vaddr addr, vaddr len);

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