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6aa4f1d1 |
| 27-Apr-2023 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) Make special new_value for USR
Precursor to moving new_value from the global state to DisasContext
USR will need to stay in the global state because some helpers will set i
Hexagon (target/hexagon) Make special new_value for USR
Precursor to moving new_value from the global state to DisasContext
USR will need to stay in the global state because some helpers will set it's value
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427230012.3800327-17-tsimpson@quicinc.com>
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#
455e169d |
| 27-Apr-2023 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) Short-circuit packet predicate writes
In certain cases, we can avoid the overhead of writing to hex_new_pred_value and write directly to hex_pred. We consider predicate rea
Hexagon (target/hexagon) Short-circuit packet predicate writes
In certain cases, we can avoid the overhead of writing to hex_new_pred_value and write directly to hex_pred. We consider predicate reads/writes when computing ctx->need_commit. The get_result_pred() function uses this field to decide between hex_new_pred_value and hex_pred. Then, we can early-exit from gen_pred_writes.
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427230012.3800327-13-tsimpson@quicinc.com>
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#
d54c5615 |
| 27-Apr-2023 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) Short-circuit packet register writes
In certain cases, we can avoid the overhead of writing to hex_new_value and write directly to hex_gpr. We add need_commit field to Disa
Hexagon (target/hexagon) Short-circuit packet register writes
In certain cases, we can avoid the overhead of writing to hex_new_value and write directly to hex_gpr. We add need_commit field to DisasContext indicating if the end-of-packet commit is needed. If it is not needed, get_result_gpr() and get_result_gpr_pair() can return hex_gpr.
We pass the ctx->need_commit to helpers when needed.
Finally, we can early-exit from gen_reg_writes during packet commit.
There are a few instructions whose semantics write to the result before reading all the inputs. Therefore, the idef-parser generated code is incompatible with short-circuit. We tell idef-parser to skip them.
For debugging purposes, we add a cpu property to turn off short-circuit. When the short-circuit property is false, we skip the analysis and force the end-of-packet commit.
Here's a simple example of the TCG generated for 0x004000b4: 0x7800c020 { R0 = #0x1 }
BEFORE: ---- 004000b4 movi_i32 new_r0,$0x1 mov_i32 r0,new_r0
AFTER: ---- 004000b4 movi_i32 r0,$0x1
This patch reintroduces a use of check_for_attrib, so we remove the G_GNUC_UNUSED added earlier in this series.
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20230427230012.3800327-12-tsimpson@quicinc.com>
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#
07540a28 |
| 27-Apr-2023 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write
Add DisasContext arg to gen_log_reg_write_pair also
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Hend
Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write
Add DisasContext arg to gen_log_reg_write_pair also
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230427230012.3800327-3-tsimpson@quicinc.com>
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Revision tags: v8.0.0 |
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#
148ef7fd |
| 05-Apr-2023 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) Updates to USR should use get_result_gpr
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230405164211.30015-3-
Hexagon (target/hexagon) Updates to USR should use get_result_gpr
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230405164211.30015-3-tsimpson@quicinc.com>
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Revision tags: v7.2.0 |
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#
42659e04 |
| 23-Sep-2022 |
Niccolò Izzo <nizzo@rev.ng> |
target/hexagon: introduce new helper functions
These helpers will be employed by the idef-parser generated code, to correctly implement instruction semantics. "Helper" functions, in the context of t
target/hexagon: introduce new helper functions
These helpers will be employed by the idef-parser generated code, to correctly implement instruction semantics. "Helper" functions, in the context of this patch, refers to functions which provide a manual TCG implementation of certain features.
Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Niccolò Izzo <nizzo@rev.ng> Signed-off-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220923173831.227551-6-anjo@rev.ng>
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#
7e8b3b39 |
| 23-Sep-2022 |
Paolo Montesel <babush@rev.ng> |
target/hexagon: make helper functions non-static
Make certain helper functions non-static, making them available outside genptr.c. These functions are required by code generated by the idef-parser.
target/hexagon: make helper functions non-static
Make certain helper functions non-static, making them available outside genptr.c. These functions are required by code generated by the idef-parser.
This commit also makes some functions in op_helper.c non-static in order to avoid having them marked as unused when using the idef-parser generated code.
Signed-off-by: Alessandro Di Federico <ale@rev.ng> Signed-off-by: Paolo Montesel <babush@rev.ng> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20220923173831.227551-5-anjo@rev.ng>
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Revision tags: v7.0.0, v6.2.0, v6.1.0 |
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#
e90ef023 |
| 19-Feb-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-02-18' into staging QAPI patches patches for 2021-02-18 # gpg: Signature made Thu 18 Feb 2021 18:51:35 GMT # gpg
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-02-18' into staging QAPI patches patches for 2021-02-18 # gpg: Signature made Thu 18 Feb 2021 18:51:35 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2021-02-18: qapi/introspect.py: set _gen_tree's default ifcond argument to () qapi/introspect.py: Type _gen_tree variants as Sequence[str] qapi/introspect.py: Update copyright and authors list qapi/introspect.py: Add docstrings to _gen_tree and _tree_to_qlit qapi/introspect.py: add type hint annotations qapi/introspect.py: remove _gen_variants helper qapi/introspect.py: improve readability of _tree_to_qlit qapi/introspect.py: improve _tree_to_qlit error message qapi/introspect.py: create a typed 'Annotated' data strutcure qapi/introspect.py: Introduce preliminary tree typing qapi/introspect.py: Always define all 'extra' dict keys qapi/introspect.py: replace 'extra' dict with 'comment' argument qapi/introspect.py: Unify return type of _make_tree() qapi/introspect.py: guard against ifcond/comment misuse qapi/introspect.py: add _gen_features helper qapi/introspect.py: use _make_tree for features nodes qapi/introspect.py: assert schema is not None qapi: Replace List[str] with Sequence[str] for ifcond Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
c79f01c9 |
| 18-Feb-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into staging Initial commit for the Qualcomm Hexagon processor. # gpg: Signature made Thu 18 Feb 2021 16:26:
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into staging Initial commit for the Qualcomm Hexagon processor. # gpg: Signature made Thu 18 Feb 2021 16:26:52 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-hex-20210218: (35 commits) Hexagon build infrastructure Hexagon (tests/tcg/hexagon) TCG tests - floating point Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc Hexagon (tests/tcg/hexagon) TCG tests - multiarch Hexagon (linux-user/hexagon) Linux user emulation Hexagon (target/hexagon) translation Hexagon (target/hexagon) TCG for floating point instructions Hexagon (target/hexagon) TCG for instructions with multiple definitions Hexagon (target/hexagon) TCG generation Hexagon (target/hexagon) instruction classes Hexagon (target/hexagon) macros Hexagon (target/hexagon) opcode data structures Hexagon (target/hexagon) generater phase 4 - decode tree Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree Hexagon (target/hexagon) generator phase 2 - generate header files Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics Hexagon (target/hexagon/imported) arch import Hexagon (target/hexagon/fma_emu.[ch]) utility functions Hexagon (target/hexagon/conv_emu.[ch]) utility functions Hexagon (target/hexagon/arch.[ch]) utility functions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
57acfcde |
| 07-Feb-2021 |
Taylor Simpson <tsimpson@quicinc.com> |
Hexagon (target/hexagon) TCG generation Include the generated files and set up the data structures Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1612763186-1
Hexagon (target/hexagon) TCG generation Include the generated files and set up the data structures Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <1612763186-18161-27-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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