| /openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
| H A D | mxc_hdmi.h | 19 u8 design_id; /* 0x000 */
20 u8 revision_id; /* 0x001 */
21 u8 product_id0; /* 0x002 */
22 u8 product_id1; /* 0x003 */
23 u8 config0_id; /* 0x004 */
24 u8 config1_id; /* 0x005 */
25 u8 config2_id; /* 0x006 */
26 u8 config3_id; /* 0x007 */
27 u8 reserved1[0xf8];
29 u8 ih_fc_stat0; /* 0x100 */
[all …]
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| /openbmc/u-boot/board/freescale/common/ |
| H A D | pixis.h | 11 u8 id;
12 u8 ver;
13 u8 pver;
14 u8 csr;
15 u8 rst;
16 u8 rst2;
17 u8 aux1;
18 u8 spd;
19 u8 aux2;
20 u8 csr2;
[all …]
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| H A D | qixis.h | 13 u8 id; /* ID value uniquely identifying each QDS board type */
14 u8 arch; /* Board version information */
15 u8 scver; /* QIXIS Version Register */
16 u8 model; /* Information of software programming model version */
17 u8 tagdata;
18 u8 ctl_sys;
19 u8 aux; /* Auxiliary Register,0x06 */
20 u8 clk_spd;
21 u8 stat_dut;
22 u8 stat_sys;
[all …]
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| H A D | ngpixis.h | 14 u8 id;
15 u8 arch;
16 u8 scver;
17 u8 csr;
18 u8 rst;
19 u8 serclk;
20 u8 aux;
21 u8 spd;
22 u8 brdcfg0;
23 u8 brdcfg1; /* On some boards, this register is called 'dma' */
[all …]
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| /openbmc/u-boot/arch/m68k/include/asm/ |
| H A D | immap_5301x.h | 78 u8 rsvd1[19]; /* 0x00 - 0x12 */
79 u8 wcr; /* 0x13 */
82 u8 rsvd3[3]; /* 0x18 - 0x1A */
83 u8 cwsr; /* 0x1B */
84 u8 rsvd4[3]; /* 0x1C - 0x1E */
85 u8 scmisr; /* 0x1F */
87 u8 bcr; /* 0x24 */
88 u8 rsvd6[74]; /* 0x25 - 0x6F */
90 u8 rsvd7; /* 0x74 */
91 u8 cfier; /* 0x75 */
[all …]
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| H A D | immap_5445x.h | 74 u8 resv0[0x18];
76 u8 resv1[0x6];
82 u8 rcr;
83 u8 rsr;
88 u8 ccm_resv0[0x4];
90 u8 resv1[0x2];
93 u8 resv2[0x4];
101 u8 podr_fec0h; /* FEC0 High Port Output Data Register */
102 u8 podr_fec0l; /* FEC0 Low Port Output Data Register */
103 u8 podr_ssi; /* SSI Port Output Data Register */
[all …]
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| H A D | immap_5235.h | 64 u8 crsr; /* 0x10 Core Reset Status Register */
65 u8 cwcr; /* 0x11 Core Watchdog Control Register */
66 u8 lpicr; /* 0x12 Low-Power Interrupt Control Register */
67 u8 cwsr; /* 0x13 Core Watchdog Service Register */
71 u8 mpr; /* 0x20 */
72 u8 res4[3]; /* 0x21 - 0x23 */
73 u8 pacr0; /* 0x24 */
74 u8 pacr1; /* 0x25 */
75 u8 pacr2; /* 0x26 */
76 u8 pacr3; /* 0x27 */
[all …]
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| H A D | immap_5329.h | 94 u8 res1[19]; /* 0x00 - 0x12 */
95 u8 wcr; /* 0x13 wakeup control register */
98 u8 res3[3]; /* 0x18 - 0x1A */
99 u8 cwsr; /* 0x1B Core Watchdog Service Register */
100 u8 res4[2]; /* 0x1C - 0x1D */
101 u8 scmisr; /* 0x1F Interrupt Status Register */
106 u8 res7[4]; /* 0x71 - 0x74 */
107 u8 cfier; /* 0x75 Core Fault Interrupt Enable Register */
108 u8 cfloc; /* 0x76 Core Fault Location Register */
109 u8 cfatr; /* 0x77 Core Fault Attributes Register */
[all …]
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| H A D | immap_5275.h | 68 u8 crsr;
69 u8 cwcr;
70 u8 lpicr;
71 u8 cwsr;
72 u8 res3[8];
74 u8 mpr;
75 u8 res4[3];
76 u8 pacr0;
77 u8 pacr1;
78 u8 pacr2;
[all …]
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| H A D | immap_520x.h | 62 u8 rsvd1[19]; /* 0x00 - 0x12 */
63 u8 wcr; /* 0x13 */
66 u8 rsvd3[3]; /* 0x18 - 0x1A */
67 u8 cwsr; /* 0x1B */
68 u8 rsvd4[3]; /* 0x1C - 0x1E */
69 u8 scmisr; /* 0x1F */
70 u8 rsvd5[79]; /* 0x20 - 0x6F */
72 u8 rsvd7; /* 0x74 */
73 u8 cfier; /* 0x75 */
74 u8 cfloc; /* 0x76 */
[all …]
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| H A D | immap_5227x.h | 65 u8 rcr;
66 u8 rsr;
93 u8 podr_be; /* 0x00 */
94 u8 podr_cs; /* 0x01 */
95 u8 podr_fbctl; /* 0x02 */
96 u8 podr_i2c; /* 0x03 */
97 u8 rsvd1; /* 0x04 */
98 u8 podr_uart; /* 0x05 */
99 u8 podr_dspi; /* 0x06 */
100 u8 podr_timer; /* 0x07 */
[all …]
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| H A D | immap_5441x.h | 90 u8 resv0[0x18];
92 u8 resv1[0x6];
98 u8 rcr;
99 u8 rsr;
104 u8 ccm_resv0[0x4]; /* 0x00 */
106 u8 resv1[0x2]; /* 0x06 */
109 u8 resv2[0x2]; /* 0x0C */
126 u8 podr_a; /* 0x00 */
127 u8 podr_b; /* 0x01 */
128 u8 podr_c; /* 0x02 */
[all …]
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| H A D | immap_547x_8x.h | 89 u8 ocpw;
90 u8 octict;
91 u8 ctrl;
92 u8 mode;
98 u8 pwmop; /* Output Polarity */
99 u8 pwmld; /* Immediate Update */
102 u8 ovfpin; /* Ovf and Pin */
103 u8 intr; /* Interrupts */
120 u8 podr_fbctl; /*0x00 */
121 u8 podr_fbcs; /*0x01 */
[all …]
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| /openbmc/u-boot/include/ |
| H A D | fis.h | 13 u8 fis_type;
14 u8 pm_port_c;
15 u8 command;
16 u8 features;
17 u8 lba_low;
18 u8 lba_mid;
19 u8 lba_high;
20 u8 device;
21 u8 lba_low_exp;
22 u8 lba_mid_exp;
[all …]
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| H A D | usbdescriptors.h | 182 u8 bLength;
183 u8 bDescriptorType; /* 0x5 */
184 u8 bEndpointAddress;
185 u8 bmAttributes;
187 u8 bInterval;
191 u8 bLength;
192 u8 bDescriptorType; /* 0x04 */
193 u8 bInterfaceNumber;
194 u8 bAlternateSetting;
195 u8 bNumEndpoints;
[all …]
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| H A D | smbios.h | 35 u8 anchor[4];
36 u8 checksum;
37 u8 length;
38 u8 major_ver;
39 u8 minor_ver;
41 u8 entry_point_rev;
42 u8 formatted_area[5];
43 u8 intermediate_anchor[5];
44 u8 intermediate_checksum;
48 u8 bcd_rev;
[all …]
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| /openbmc/u-boot/board/keymile/common/ |
| H A D | common.h | 51 u8 xi_ena; /* General defect enable */
52 u8 pack1[3];
53 u8 en_csn;
54 u8 pack2;
55 u8 safe_mem;
56 u8 pack3;
57 u8 id;
58 u8 pack4;
59 u8 rev;
60 u8 build;
[all …]
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| /openbmc/u-boot/arch/x86/include/asm/arch-braswell/fsp/ |
| H A D | fsp_vpd.h | 12 u8 revision; /* Offset 0x0028 */
13 u8 unused2[7]; /* Offset 0x0029 */
16 u8 mrc_init_spd_addr1; /* Offset 0x0034 */
17 u8 mrc_init_spd_addr2; /* Offset 0x0035 */
18 u8 mem_ch0_config; /* Offset 0x0036 */
19 u8 mem_ch1_config; /* Offset 0x0037 */
21 u8 igd_dvmt50_pre_alloc; /* Offset 0x003c */
22 u8 aperture_size; /* Offset 0x003d */
23 u8 gtt_size; /* Offset 0x003e */
24 u8 legacy_seg_decode; /* Offset 0x003f */
[all …]
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| /openbmc/u-boot/arch/m68k/include/asm/coldfire/ |
| H A D | ata.h | 15 u8 toff; /* 0x00 */
16 u8 ton; /* 0x01 */
17 u8 t1; /* 0x02 */
18 u8 t2w; /* 0x03 */
19 u8 t2r; /* 0x04 */
20 u8 ta; /* 0x05 */
21 u8 trd; /* 0x06 */
22 u8 t4; /* 0x07 */
23 u8 t9; /* 0x08 */
26 u8 tm; /* 0x09 */
[all …]
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| H A D | intctrl.h | 27 u8 irlr; /* 0x18 */
28 u8 iacklpr; /* 0x19 */
33 u8 simr0; /* 0x1C Set Interrupt Mask */
34 u8 cimr0; /* 0x1D Clear Interrupt Mask */
35 u8 clmask0; /* 0x1E Current Level Mask */
36 u8 slmask; /* 0x1F Saved Level Mask */
39 u8 icr0[64]; /* 0x40 - 0x7F Control registers */
41 u8 swiack0; /* 0xE0 Software Interrupt ack */
42 u8 res4[3]; /* 0xE1 - 0xE3 */
43 u8 L1iack0; /* 0xE4 Level n interrupt ack */
[all …]
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| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | ddrmc-vf610.h | 14 u8 tinit;
17 u8 wrlat;
18 u8 caslat_lin;
19 u8 trc;
20 u8 trrd;
21 u8 tccd;
22 u8 tbst_int_interval;
23 u8 tfaw;
24 u8 trp;
25 u8 twtr;
[all …]
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| /openbmc/u-boot/drivers/bios_emulator/include/x86emu/ |
| H A D | prim_ops.h | 49 u16 aam_word (u8 d);
50 u8 adc_byte (u8 d, u8 s);
53 u8 add_byte (u8 d, u8 s);
56 u8 and_byte (u8 d, u8 s);
59 u8 cmp_byte (u8 d, u8 s);
62 u8 daa_byte (u8 d);
63 u8 das_byte (u8 d);
64 u8 dec_byte (u8 d);
67 u8 inc_byte (u8 d);
70 u8 or_byte (u8 d, u8 s);
[all …]
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 36 u8 res0[0x04];
38 u8 res1[0x14];
40 u8 res2[0x20];
42 u8 res3[0x10];
44 u8 res4[0x10];
46 u8 res5[0x50];
50 u8 res6[0x04];
54 u8 res7[0x04];
60 u8 res8[0xC];
71 u8 res9b[0xAC];
[all …]
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| H A D | immap_85xx.h | 29 u8 res1[4];
33 u8 res2[4];
37 u8 res3[0xbd4];
42 u8 res4[4];
44 u8 res35[0x204];
50 u8 res1[4];
52 u8 res2[4];
54 u8 res3[12];
56 u8 res4[3044];
58 u8 res5[4];
[all …]
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| /openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | clock_sun50i_h6.h | 14 u8 reserved_0x004[12];
16 u8 reserved_0x014[12];
18 u8 reserved_0x020[4];
20 u8 reserved_0x028[4];
22 u8 reserved_0x034[12];
24 u8 reserved_0x044[4];
26 u8 reserved_0x04c[12];
28 u8 reserved_0x05c[4];
30 u8 reserved_0x064[12];
32 u8 reserved_0x074[4];
[all …]
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