Home
last modified time | relevance | path

Searched refs:txq_map (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_lib.c100 sizeof(*vsi->txq_map), GFP_KERNEL); in ice_vsi_alloc_arrays()
102 if (!vsi->txq_map) in ice_vsi_alloc_arrays()
125 devm_kfree(dev, vsi->txq_map); in ice_vsi_alloc_arrays()
325 devm_kfree(dev, vsi->txq_map); in ice_vsi_free_arrays()
326 vsi->txq_map = NULL; in ice_vsi_free_arrays()
775 .vsi_map = vsi->txq_map, in ice_vsi_get_qs()
819 clear_bit(vsi->txq_map[i], pf->avail_txqs); in ice_vsi_put_qs()
820 vsi->txq_map[i] = ICE_INVAL_Q_INDEX; in ice_vsi_put_qs()
1423 ring->reg_idx = vsi->txq_map[i]; in ice_vsi_alloc_rings()
2713 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), 0); in ice_vsi_release_msix()
[all …]
H A Dice_base.c930 wr32(hw, QINT_TQCTL(vsi->txq_map[txq]), val); in ice_cfg_txq_interrupt()
934 wr32(hw, QINT_TQCTL(vsi->txq_map[xdp_txq]), in ice_cfg_txq_interrupt()
H A Dice.h396 u16 *txq_map; /* index in pf->avail_txqs */ member
H A Dice_virtchnl.c1177 u32 pfq = vsi->txq_map[q_idx]; in ice_vf_ena_txq_interrupt()
1477 qmap = map->txq_map; in ice_cfg_interrupt()
1543 (!vector_id && (map->rxq_map || map->txq_map))) { in ice_vc_cfg_irq_map_msg()
H A Dice_main.c2609 xdp_ring->reg_idx = vsi->txq_map[xdp_q_idx]; in ice_xdp_alloc_setup_rings()
2676 .vsi_map = vsi->txq_map, in ice_prepare_xdp_rings()
2781 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs); in ice_prepare_xdp_rings()
2782 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX; in ice_prepare_xdp_rings()
2825 clear_bit(vsi->txq_map[i + vsi->alloc_txq], pf->avail_txqs); in ice_destroy_xdp_rings()
2826 vsi->txq_map[i + vsi->alloc_txq] = ICE_INVAL_Q_INDEX; in ice_destroy_xdp_rings()
7885 head = (rd32(hw, QTX_COMM_HEAD(vsi->txq_map[txqueue])) & in ice_tx_timeout()
H A Dice_sriov.c341 reg = (((vsi->txq_map[0] << VPLAN_TX_QBASE_VFFIRSTQ_S) & in ice_ena_vf_q_mappings()
H A Dice_lag.c342 qid = pf->vsi[vsi_num]->txq_map[q_ctx->q_handle]; in ice_lag_qbuf_recfg()
/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dlink.c32 txq = sc->tx.txq_map[i]; in ath_tx_complete_check()
182 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE]; in ath_paprd_send_frame()
H A Ddebug.h196 #define PR_QNUM(_n) sc->tx.txq_map[_n]->axq_qnum
H A Dtx99.c126 txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; in ath9k_tx99_init()
H A Dinit.c417 sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i); in ath9k_init_queues()
418 sc->tx.txq_map[i]->mac80211_qnum = i; in ath9k_init_queues()
H A Dgpio.c429 txq = sc->tx.txq_map[IEEE80211_AC_BE]; in ath9k_init_btcoex()
H A Dxmit.c220 txq = sc->tx.txq_map[q]; in ath_txq_skb_done()
258 if (tid->txq == sc->tx.txq_map[q]) { in ath_tid_pull()
2024 txq = sc->tx.txq_map[i]; in ath_txq_schedule_all()
2370 if (txq == sc->tx.txq_map[q]) { in ath_tx_start()
2881 tid->txq = sc->tx.txq_map[acno]; in ath_tx_node_init()
H A Dbeacon.c50 txq = sc->tx.txq_map[IEEE80211_AC_BE]; in ath9k_beaconq_config()
H A Dchannel.c1016 txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; in ath_scan_send_probe()
1137 txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO]; in ath_chanctx_send_vif_ps_frame()
H A Dath9k.h293 struct ath_txq *txq_map[IEEE80211_NUM_ACS]; member
H A Dmain.c814 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; in ath9k_tx()
1727 txq = sc->tx.txq_map[queue]; in ath9k_conf_tx()
H A Ddebug.c632 txq = sc->tx.txq_map[i]; in read_file_queues()
/openbmc/linux/drivers/net/ethernet/cisco/enic/
H A Denic_main.c825 unsigned int txq_map; in enic_hard_start_xmit() local
833 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; in enic_hard_start_xmit()
834 wq = &enic->wq[txq_map]; in enic_hard_start_xmit()
835 txq = netdev_get_tx_queue(netdev, txq_map); in enic_hard_start_xmit()
849 spin_lock(&enic->wq_lock[txq_map]); in enic_hard_start_xmit()
856 spin_unlock(&enic->wq_lock[txq_map]); in enic_hard_start_xmit()
870 spin_unlock(&enic->wq_lock[txq_map]); in enic_hard_start_xmit()
/openbmc/linux/drivers/net/ethernet/marvell/
H A Dmvneta.c1497 int rxq_map = 0, txq_map = 0; in mvneta_defaults_set() local
1506 txq_map |= MVNETA_CPU_TXQ_ACCESS(txq); in mvneta_defaults_set()
1513 txq_map = (cpu == pp->rxq_def) ? in mvneta_defaults_set()
1517 txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK; in mvneta_defaults_set()
1521 mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); in mvneta_defaults_set()
4342 int rxq_map = 0, txq_map = 0; in mvneta_percpu_elect() local
4358 txq_map = (cpu == elected_cpu) ? in mvneta_percpu_elect()
4361 txq_map = mvreg_read(pp, MVNETA_CPU_MAP(cpu)) & in mvneta_percpu_elect()
4364 mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); in mvneta_percpu_elect()
/openbmc/linux/include/linux/avf/
H A Dvirtchnl.h386 u16 txq_map; member
/openbmc/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_virtchnl.c412 vecmap->txq_map = q_vector->ring_mask; in iavf_map_queues()
421 vecmap->txq_map = 0; in iavf_map_queues()
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_virtchnl_pf.c391 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) { in i40e_config_irq_link_list()
402 tempmap = vecmap->txq_map; in i40e_config_irq_link_list()
2519 if (i40e_validate_queue_map(vf, vsi_id, map->txq_map)) { in i40e_vc_config_irq_map_msg()