1837f08fdSAnirudh Venkataramanan /* SPDX-License-Identifier: GPL-2.0 */
2837f08fdSAnirudh Venkataramanan /* Copyright (c) 2018, Intel Corporation. */
3837f08fdSAnirudh Venkataramanan
4837f08fdSAnirudh Venkataramanan #ifndef _ICE_H_
5837f08fdSAnirudh Venkataramanan #define _ICE_H_
6837f08fdSAnirudh Venkataramanan
7837f08fdSAnirudh Venkataramanan #include <linux/types.h>
8837f08fdSAnirudh Venkataramanan #include <linux/errno.h>
9837f08fdSAnirudh Venkataramanan #include <linux/kernel.h>
10837f08fdSAnirudh Venkataramanan #include <linux/module.h>
11462acf6aSTony Nguyen #include <linux/firmware.h>
12837f08fdSAnirudh Venkataramanan #include <linux/netdevice.h>
13837f08fdSAnirudh Venkataramanan #include <linux/compiler.h>
14dc49c772SAnirudh Venkataramanan #include <linux/etherdevice.h>
15cdedef59SAnirudh Venkataramanan #include <linux/skbuff.h>
163a858ba3SAnirudh Venkataramanan #include <linux/cpumask.h>
17fcea6f3dSAnirudh Venkataramanan #include <linux/rtnetlink.h>
183a858ba3SAnirudh Venkataramanan #include <linux/if_vlan.h>
19cdedef59SAnirudh Venkataramanan #include <linux/dma-mapping.h>
20837f08fdSAnirudh Venkataramanan #include <linux/pci.h>
21940b61afSAnirudh Venkataramanan #include <linux/workqueue.h>
22d69ea414SJacob Keller #include <linux/wait.h>
23940b61afSAnirudh Venkataramanan #include <linux/interrupt.h>
24fcea6f3dSAnirudh Venkataramanan #include <linux/ethtool.h>
25940b61afSAnirudh Venkataramanan #include <linux/timer.h>
267ec59eeaSAnirudh Venkataramanan #include <linux/delay.h>
27837f08fdSAnirudh Venkataramanan #include <linux/bitmap.h>
283a858ba3SAnirudh Venkataramanan #include <linux/log2.h>
29d76a60baSAnirudh Venkataramanan #include <linux/ip.h>
30cf909e19SAnirudh Venkataramanan #include <linux/sctp.h>
31d76a60baSAnirudh Venkataramanan #include <linux/ipv6.h>
32efc2214bSMaciej Fijalkowski #include <linux/pkt_sched.h>
33940b61afSAnirudh Venkataramanan #include <linux/if_bridge.h>
34e3710a01SPaul M Stillwell Jr #include <linux/ctype.h>
359136e1f1SPaul Greenwalt #include <linux/linkmode.h>
36efc2214bSMaciej Fijalkowski #include <linux/bpf.h>
37195bb48fSMichal Swiatkowski #include <linux/btf.h>
38f9f5301eSDave Ertman #include <linux/auxiliary_bus.h>
39ddf30f7fSAnirudh Venkataramanan #include <linux/avf/virtchnl.h>
4028bf2672SBrett Creeley #include <linux/cpu_rmap.h>
41cdf1f1f1SJacob Keller #include <linux/dim.h>
42c7ef8221SArkadiusz Kubalewski #include <linux/gnss.h>
430754d65bSKiran Patil #include <net/pkt_cls.h>
449adafe2bSVladimir Oltean #include <net/pkt_sched.h>
459fea7498SKiran Patil #include <net/tc_act/tc_mirred.h>
469fea7498SKiran Patil #include <net/tc_act/tc_gact.h>
479fea7498SKiran Patil #include <net/ip.h>
481adf7eadSJacob Keller #include <net/devlink.h>
49d76a60baSAnirudh Venkataramanan #include <net/ipv6.h>
502d4238f5SKrzysztof Kazimierczak #include <net/xdp_sock.h>
51c7a21904SMichal Swiatkowski #include <net/xdp_sock_drv.h>
52a4e82a81STony Nguyen #include <net/geneve.h>
53a4e82a81STony Nguyen #include <net/gre.h>
54a4e82a81STony Nguyen #include <net/udp_tunnel.h>
55a4e82a81STony Nguyen #include <net/vxlan.h>
569a225f81SMarcin Szycik #include <net/gtp.h>
57cd8efeeeSMarcin Szycik #include <linux/ppp_defs.h>
58837f08fdSAnirudh Venkataramanan #include "ice_devids.h"
59837f08fdSAnirudh Venkataramanan #include "ice_type.h"
60940b61afSAnirudh Venkataramanan #include "ice_txrx.h"
6137b6f646SAnirudh Venkataramanan #include "ice_dcb.h"
629c20346bSAnirudh Venkataramanan #include "ice_switch.h"
63f31e4b6fSAnirudh Venkataramanan #include "ice_common.h"
64fbc7b27aSKiran Patil #include "ice_flow.h"
659c20346bSAnirudh Venkataramanan #include "ice_sched.h"
66348048e7SDave Ertman #include "ice_idc_int.h"
670deb0bf7SJacob Keller #include "ice_sriov.h"
68d775155aSJacob Keller #include "ice_vf_mbx.h"
6906c16d89SJacob Keller #include "ice_ptp.h"
70148beb61SHenry Tieman #include "ice_fdir.h"
712d4238f5SKrzysztof Kazimierczak #include "ice_xsk.h"
7228bf2672SBrett Creeley #include "ice_arfs.h"
7337165e3fSMichal Swiatkowski #include "ice_repr.h"
740d08a441SKiran Patil #include "ice_eswitch.h"
75df006dd4SDave Ertman #include "ice_lag.h"
76bc42afa9SBrett Creeley #include "ice_vsi_vlan_ops.h"
7743113ff7SKarol Kolacinski #include "ice_gnss.h"
7838e97a98SPiotr Raczynski #include "ice_irq.h"
79837f08fdSAnirudh Venkataramanan
80837f08fdSAnirudh Venkataramanan #define ICE_BAR0 0
813a858ba3SAnirudh Venkataramanan #define ICE_REQ_DESC_MULTIPLE 32
828be92a76SPreethi Banala #define ICE_MIN_NUM_DESC 64
833b6bf296SBruce Allan #define ICE_MAX_NUM_DESC 8160
841aec6e1bSBrett Creeley #define ICE_DFLT_MIN_RX_DESC 512
85dd47e1fdSJesse Brandeburg #define ICE_DFLT_NUM_TX_DESC 256
86dd47e1fdSJesse Brandeburg #define ICE_DFLT_NUM_RX_DESC 2048
87ad71b256SBrett Creeley
885513b920SAnirudh Venkataramanan #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
89940b61afSAnirudh Venkataramanan #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
908f5ee3c4SJacob Keller #define ICE_AQ_LEN 192
9111836214SBrett Creeley #define ICE_MBXSQ_LEN 64
928f5ee3c4SJacob Keller #define ICE_SBQ_LEN 64
93f3fe97f6SBrett Creeley #define ICE_MIN_LAN_TXRX_MSIX 1
94f3fe97f6SBrett Creeley #define ICE_MIN_LAN_OICR_MSIX 1
95f3fe97f6SBrett Creeley #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
96da62c5ffSQi Zhang #define ICE_FDIR_MSIX 2
97d25a0fc4SDave Ertman #define ICE_RDMA_NUM_AEQ_MSIX 4
98d25a0fc4SDave Ertman #define ICE_MIN_RDMA_MSIX 2
99f66756e0SGrzegorz Nitka #define ICE_ESWITCH_MSIX 1
1003a858ba3SAnirudh Venkataramanan #define ICE_NO_VSI 0xffff
1013a858ba3SAnirudh Venkataramanan #define ICE_VSI_MAP_CONTIG 0
1023a858ba3SAnirudh Venkataramanan #define ICE_VSI_MAP_SCATTER 1
1033a858ba3SAnirudh Venkataramanan #define ICE_MAX_SCATTER_TXQS 16
1043a858ba3SAnirudh Venkataramanan #define ICE_MAX_SCATTER_RXQS 16
105cdedef59SAnirudh Venkataramanan #define ICE_Q_WAIT_RETRY_LIMIT 10
106cdedef59SAnirudh Venkataramanan #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)
107d76a60baSAnirudh Venkataramanan #define ICE_MAX_LG_RSS_QS 256
1083a858ba3SAnirudh Venkataramanan #define ICE_INVAL_Q_INDEX 0xffff
109837f08fdSAnirudh Venkataramanan
1108134d5ffSBrett Creeley #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
1110754d65bSKiran Patil
1120754d65bSKiran Patil #define ICE_CHNL_START_TC 1
1130754d65bSKiran Patil
114afd9d4abSAnirudh Venkataramanan #define ICE_MAX_RESET_WAIT 20
115afd9d4abSAnirudh Venkataramanan
116fcea6f3dSAnirudh Venkataramanan #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)
117fcea6f3dSAnirudh Venkataramanan
118837f08fdSAnirudh Venkataramanan #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
119837f08fdSAnirudh Venkataramanan
120efc2214bSMaciej Fijalkowski #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
1213a858ba3SAnirudh Venkataramanan
122fce92dbcSPawel Chmielewski #define ICE_MAX_TSO_SIZE 131072
123fce92dbcSPawel Chmielewski
1243a858ba3SAnirudh Venkataramanan #define ICE_UP_TABLE_TRANSLATE(val, i) \
1253a858ba3SAnirudh Venkataramanan (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
1263a858ba3SAnirudh Venkataramanan ICE_AQ_VSI_UP_TABLE_UP##i##_M)
1273a858ba3SAnirudh Venkataramanan
1282b245cb2SAnirudh Venkataramanan #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
129cdedef59SAnirudh Venkataramanan #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
130d76a60baSAnirudh Venkataramanan #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
131cac2a27cSHenry Tieman #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
132cdedef59SAnirudh Venkataramanan
133fbc7b27aSKiran Patil /* Minimum BW limit is 500 Kbps for any scheduler node */
134fbc7b27aSKiran Patil #define ICE_MIN_BW_LIMIT 500
135fbc7b27aSKiran Patil /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
136fbc7b27aSKiran Patil * use it to convert user specified BW limit into Kbps
137fbc7b27aSKiran Patil */
138fbc7b27aSKiran Patil #define ICE_BW_KBPS_DIVISOR 125
139fbc7b27aSKiran Patil
140143b86f3SAmritha Nambiar /* Default recipes have priority 4 and below, hence priority values between 5..7
141143b86f3SAmritha Nambiar * can be used as filter priority for advanced switch filter (advanced switch
142143b86f3SAmritha Nambiar * filters need new recipe to be created for specified extraction sequence
143143b86f3SAmritha Nambiar * because default recipe extraction sequence does not represent custom
144143b86f3SAmritha Nambiar * extraction)
145143b86f3SAmritha Nambiar */
146143b86f3SAmritha Nambiar #define ICE_SWITCH_FLTR_PRIO_QUEUE 7
147143b86f3SAmritha Nambiar /* prio 6 is reserved for future use (e.g. switch filter with L3 fields +
148143b86f3SAmritha Nambiar * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as
149143b86f3SAmritha Nambiar * SYN/FIN/RST))
150143b86f3SAmritha Nambiar */
151143b86f3SAmritha Nambiar #define ICE_SWITCH_FLTR_PRIO_RSVD 6
152143b86f3SAmritha Nambiar #define ICE_SWITCH_FLTR_PRIO_VSI 5
153143b86f3SAmritha Nambiar #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI
154143b86f3SAmritha Nambiar
1550b28b702SAnirudh Venkataramanan /* Macro for each VSI in a PF */
1560b28b702SAnirudh Venkataramanan #define ice_for_each_vsi(pf, i) \
1570b28b702SAnirudh Venkataramanan for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
1580b28b702SAnirudh Venkataramanan
1592faf63b6SMaciej Fijalkowski /* Macros for each Tx/Xdp/Rx ring in a VSI */
160cdedef59SAnirudh Venkataramanan #define ice_for_each_txq(vsi, i) \
161cdedef59SAnirudh Venkataramanan for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
162cdedef59SAnirudh Venkataramanan
1632faf63b6SMaciej Fijalkowski #define ice_for_each_xdp_txq(vsi, i) \
1642faf63b6SMaciej Fijalkowski for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
1652faf63b6SMaciej Fijalkowski
166cdedef59SAnirudh Venkataramanan #define ice_for_each_rxq(vsi, i) \
167cdedef59SAnirudh Venkataramanan for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
168cdedef59SAnirudh Venkataramanan
169d337f2afSAnirudh Venkataramanan /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
170f8ba7db8SJacob Keller #define ice_for_each_alloc_txq(vsi, i) \
171f8ba7db8SJacob Keller for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
172f8ba7db8SJacob Keller
173f8ba7db8SJacob Keller #define ice_for_each_alloc_rxq(vsi, i) \
174f8ba7db8SJacob Keller for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
175f8ba7db8SJacob Keller
17667fe64d7SBrett Creeley #define ice_for_each_q_vector(vsi, i) \
17767fe64d7SBrett Creeley for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
17867fe64d7SBrett Creeley
1790754d65bSKiran Patil #define ice_for_each_chnl_tc(i) \
1800754d65bSKiran Patil for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
1810754d65bSKiran Patil
1821a8c7778SBrett Creeley #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
1835eda8afdSAkeem G Abodunrin
1845eda8afdSAkeem G Abodunrin #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
1855eda8afdSAkeem G Abodunrin ICE_PROMISC_UCAST_RX | \
1865eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_TX | \
1875eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_RX)
1885eda8afdSAkeem G Abodunrin
1895eda8afdSAkeem G Abodunrin #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
1905eda8afdSAkeem G Abodunrin
1915eda8afdSAkeem G Abodunrin #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
1925eda8afdSAkeem G Abodunrin ICE_PROMISC_MCAST_RX | \
1935eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_TX | \
1945eda8afdSAkeem G Abodunrin ICE_PROMISC_VLAN_RX)
1955eda8afdSAkeem G Abodunrin
1964015d11eSBrett Creeley #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
1974015d11eSBrett Creeley
19840b24760SAnirudh Venkataramanan enum ice_feature {
19940b24760SAnirudh Venkataramanan ICE_F_DSCP,
200896a55aaSAnirudh Venkataramanan ICE_F_PTP_EXTTS,
201325b2064SMaciej Machnikowski ICE_F_SMA_CTRL,
20243113ff7SKarol Kolacinski ICE_F_GNSS,
203bb52f42aSDave Ertman ICE_F_ROCE_LAG,
204bb52f42aSDave Ertman ICE_F_SRIOV_LAG,
20540b24760SAnirudh Venkataramanan ICE_F_MAX
20640b24760SAnirudh Venkataramanan };
20740b24760SAnirudh Venkataramanan
20822bf877eSMaciej Fijalkowski DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
20922bf877eSMaciej Fijalkowski
2100754d65bSKiran Patil struct ice_channel {
2110754d65bSKiran Patil struct list_head list;
2120754d65bSKiran Patil u8 type;
2130754d65bSKiran Patil u16 sw_id;
2140754d65bSKiran Patil u16 base_q;
2150754d65bSKiran Patil u16 num_rxq;
2160754d65bSKiran Patil u16 num_txq;
2170754d65bSKiran Patil u16 vsi_num;
2180754d65bSKiran Patil u8 ena_tc;
2190754d65bSKiran Patil struct ice_aqc_vsi_props info;
2200754d65bSKiran Patil u64 max_tx_rate;
2210754d65bSKiran Patil u64 min_tx_rate;
22240319796SKiran Patil atomic_t num_sb_fltr;
2230754d65bSKiran Patil struct ice_vsi *ch_vsi;
2240754d65bSKiran Patil };
2250754d65bSKiran Patil
226eff380aaSAnirudh Venkataramanan struct ice_txq_meta {
227eff380aaSAnirudh Venkataramanan u32 q_teid; /* Tx-scheduler element identifier */
228eff380aaSAnirudh Venkataramanan u16 q_id; /* Entry in VSI's txq_map bitmap */
229eff380aaSAnirudh Venkataramanan u16 q_handle; /* Relative index of Tx queue within TC */
230eff380aaSAnirudh Venkataramanan u16 vsi_idx; /* VSI index that Tx queue belongs to */
231eff380aaSAnirudh Venkataramanan u8 tc; /* TC number that Tx queue belongs to */
232eff380aaSAnirudh Venkataramanan };
233eff380aaSAnirudh Venkataramanan
2343a858ba3SAnirudh Venkataramanan struct ice_tc_info {
2353a858ba3SAnirudh Venkataramanan u16 qoffset;
236c5a2a4a3SUsha Ketineni u16 qcount_tx;
237c5a2a4a3SUsha Ketineni u16 qcount_rx;
238c5a2a4a3SUsha Ketineni u8 netdev_tc;
2393a858ba3SAnirudh Venkataramanan };
2403a858ba3SAnirudh Venkataramanan
2413a858ba3SAnirudh Venkataramanan struct ice_tc_cfg {
2423a858ba3SAnirudh Venkataramanan u8 numtc; /* Total number of enabled TCs */
2430754d65bSKiran Patil u16 ena_tc; /* Tx map */
2443a858ba3SAnirudh Venkataramanan struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
2453a858ba3SAnirudh Venkataramanan };
2463a858ba3SAnirudh Venkataramanan
24703f7a986SAnirudh Venkataramanan struct ice_qs_cfg {
24894c4441bSAnirudh Venkataramanan struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
24903f7a986SAnirudh Venkataramanan unsigned long *pf_map;
25003f7a986SAnirudh Venkataramanan unsigned long pf_map_size;
25103f7a986SAnirudh Venkataramanan unsigned int q_count;
25203f7a986SAnirudh Venkataramanan unsigned int scatter_count;
25303f7a986SAnirudh Venkataramanan u16 *vsi_map;
25403f7a986SAnirudh Venkataramanan u16 vsi_map_offset;
25503f7a986SAnirudh Venkataramanan u8 mapping_mode;
25603f7a986SAnirudh Venkataramanan };
25703f7a986SAnirudh Venkataramanan
258940b61afSAnirudh Venkataramanan struct ice_sw {
259940b61afSAnirudh Venkataramanan struct ice_pf *pf;
260940b61afSAnirudh Venkataramanan u16 sw_id; /* switch ID for this switch */
261940b61afSAnirudh Venkataramanan u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
262940b61afSAnirudh Venkataramanan };
263940b61afSAnirudh Venkataramanan
264e97fb1aeSAnirudh Venkataramanan enum ice_pf_state {
2657e408e07SAnirudh Venkataramanan ICE_TESTING,
2667e408e07SAnirudh Venkataramanan ICE_DOWN,
2677e408e07SAnirudh Venkataramanan ICE_NEEDS_RESTART,
2687e408e07SAnirudh Venkataramanan ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
2697e408e07SAnirudh Venkataramanan ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
270348048e7SDave Ertman ICE_PFR_REQ, /* set by driver */
271348048e7SDave Ertman ICE_CORER_REQ, /* set by driver */
272348048e7SDave Ertman ICE_GLOBR_REQ, /* set by driver */
2737e408e07SAnirudh Venkataramanan ICE_CORER_RECV, /* set by OICR handler */
2747e408e07SAnirudh Venkataramanan ICE_GLOBR_RECV, /* set by OICR handler */
2757e408e07SAnirudh Venkataramanan ICE_EMPR_RECV, /* set by OICR handler */
2767e408e07SAnirudh Venkataramanan ICE_SUSPENDED, /* set on module remove path */
2777e408e07SAnirudh Venkataramanan ICE_RESET_FAILED, /* set by reset/rebuild */
278ddf30f7fSAnirudh Venkataramanan /* When checking for the PF to be in a nominal operating state, the
279ddf30f7fSAnirudh Venkataramanan * bits that are grouped at the beginning of the list need to be
2807e408e07SAnirudh Venkataramanan * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
281ddf30f7fSAnirudh Venkataramanan * be checked. If you need to add a bit into consideration for nominal
282ddf30f7fSAnirudh Venkataramanan * operating state, it must be added before
2837e408e07SAnirudh Venkataramanan * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
284ddf30f7fSAnirudh Venkataramanan * without appropriate consideration.
285ddf30f7fSAnirudh Venkataramanan */
2867e408e07SAnirudh Venkataramanan ICE_STATE_NOMINAL_CHECK_BITS,
2877e408e07SAnirudh Venkataramanan ICE_ADMINQ_EVENT_PENDING,
2887e408e07SAnirudh Venkataramanan ICE_MAILBOXQ_EVENT_PENDING,
2898f5ee3c4SJacob Keller ICE_SIDEBANDQ_EVENT_PENDING,
2907e408e07SAnirudh Venkataramanan ICE_MDD_EVENT_PENDING,
2917e408e07SAnirudh Venkataramanan ICE_VFLR_EVENT_PENDING,
2927e408e07SAnirudh Venkataramanan ICE_FLTR_OVERFLOW_PROMISC,
2937e408e07SAnirudh Venkataramanan ICE_VF_DIS,
2947e408e07SAnirudh Venkataramanan ICE_CFG_BUSY,
2957e408e07SAnirudh Venkataramanan ICE_SERVICE_SCHED,
2967e408e07SAnirudh Venkataramanan ICE_SERVICE_DIS,
2977e408e07SAnirudh Venkataramanan ICE_FD_FLUSH_REQ,
2987e408e07SAnirudh Venkataramanan ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
2997e408e07SAnirudh Venkataramanan ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
3007e408e07SAnirudh Venkataramanan ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */
3017e408e07SAnirudh Venkataramanan ICE_LINK_DEFAULT_OVERRIDE_PENDING,
3027e408e07SAnirudh Venkataramanan ICE_PHY_INIT_COMPLETE,
3037e408e07SAnirudh Venkataramanan ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */
30432d53c0aSAlexander Lobakin ICE_AUX_ERR_PENDING,
3057e408e07SAnirudh Venkataramanan ICE_STATE_NBITS /* must be last */
306837f08fdSAnirudh Venkataramanan };
307837f08fdSAnirudh Venkataramanan
308e97fb1aeSAnirudh Venkataramanan enum ice_vsi_state {
309e97fb1aeSAnirudh Venkataramanan ICE_VSI_DOWN,
310e97fb1aeSAnirudh Venkataramanan ICE_VSI_NEEDS_RESTART,
311a476d72aSAnirudh Venkataramanan ICE_VSI_NETDEV_ALLOCD,
312a476d72aSAnirudh Venkataramanan ICE_VSI_NETDEV_REGISTERED,
313e97fb1aeSAnirudh Venkataramanan ICE_VSI_UMAC_FLTR_CHANGED,
314e97fb1aeSAnirudh Venkataramanan ICE_VSI_MMAC_FLTR_CHANGED,
315e97fb1aeSAnirudh Venkataramanan ICE_VSI_PROMISC_CHANGED,
316e97fb1aeSAnirudh Venkataramanan ICE_VSI_STATE_NBITS /* must be last */
317e94d4478SAnirudh Venkataramanan };
318e94d4478SAnirudh Venkataramanan
319288ecf49SBenjamin Mikailenko struct ice_vsi_stats {
320288ecf49SBenjamin Mikailenko struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */
321288ecf49SBenjamin Mikailenko struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */
322288ecf49SBenjamin Mikailenko };
323288ecf49SBenjamin Mikailenko
324940b61afSAnirudh Venkataramanan /* struct that defines a VSI, associated with a dev */
325940b61afSAnirudh Venkataramanan struct ice_vsi {
326940b61afSAnirudh Venkataramanan struct net_device *netdev;
3273a858ba3SAnirudh Venkataramanan struct ice_sw *vsw; /* switch this VSI is on */
3283a858ba3SAnirudh Venkataramanan struct ice_pf *back; /* back pointer to PF */
329940b61afSAnirudh Venkataramanan struct ice_port_info *port_info; /* back pointer to port_info */
330e72bba21SMaciej Fijalkowski struct ice_rx_ring **rx_rings; /* Rx ring array */
331e72bba21SMaciej Fijalkowski struct ice_tx_ring **tx_rings; /* Tx ring array */
3323a858ba3SAnirudh Venkataramanan struct ice_q_vector **q_vectors; /* q_vector array */
333cdedef59SAnirudh Venkataramanan
334cdedef59SAnirudh Venkataramanan irqreturn_t (*irq_handler)(int irq, void *data);
335cdedef59SAnirudh Venkataramanan
336fcea6f3dSAnirudh Venkataramanan u64 tx_linearize;
337e97fb1aeSAnirudh Venkataramanan DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
338e94d4478SAnirudh Venkataramanan unsigned int current_netdev_flags;
339fcea6f3dSAnirudh Venkataramanan u32 tx_restart;
340fcea6f3dSAnirudh Venkataramanan u32 tx_busy;
341fcea6f3dSAnirudh Venkataramanan u32 rx_buf_failed;
342fcea6f3dSAnirudh Venkataramanan u32 rx_page_failed;
34388865fc4SKarol Kolacinski u16 num_q_vectors;
344011670ccSPiotr Raczynski /* tell if only dynamic irq allocation is allowed */
345011670ccSPiotr Raczynski bool irq_dyn_alloc;
346011670ccSPiotr Raczynski
3473a858ba3SAnirudh Venkataramanan enum ice_vsi_type type;
348940b61afSAnirudh Venkataramanan u16 vsi_num; /* HW (absolute) index of this VSI */
3493a858ba3SAnirudh Venkataramanan u16 idx; /* software index in pf->vsi[] */
3503a858ba3SAnirudh Venkataramanan
351b03d519dSJacob Keller struct ice_vf *vf; /* VF associated with this VSI */
3528ede0178SAnirudh Venkataramanan
353148beb61SHenry Tieman u16 num_gfltr;
354148beb61SHenry Tieman u16 num_bfltr;
355d95276ceSAkeem G Abodunrin
356d76a60baSAnirudh Venkataramanan /* RSS config */
357d76a60baSAnirudh Venkataramanan u16 rss_table_size; /* HW RSS table size */
358d76a60baSAnirudh Venkataramanan u16 rss_size; /* Allocated RSS queues */
359d76a60baSAnirudh Venkataramanan u8 *rss_hkey_user; /* User configured hash keys */
360d76a60baSAnirudh Venkataramanan u8 *rss_lut_user; /* User configured lookup table entries */
361d76a60baSAnirudh Venkataramanan u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */
362d76a60baSAnirudh Venkataramanan
36328bf2672SBrett Creeley /* aRFS members only allocated for the PF VSI */
36428bf2672SBrett Creeley #define ICE_MAX_ARFS_LIST 1024
36528bf2672SBrett Creeley #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)
36628bf2672SBrett Creeley struct hlist_head *arfs_fltr_list;
36728bf2672SBrett Creeley struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
36828bf2672SBrett Creeley spinlock_t arfs_lock; /* protects aRFS hash table and filter state */
36928bf2672SBrett Creeley atomic_t *arfs_last_fltr_id;
37028bf2672SBrett Creeley
371cdedef59SAnirudh Venkataramanan u16 max_frame;
372cdedef59SAnirudh Venkataramanan u16 rx_buf_len;
373cdedef59SAnirudh Venkataramanan
3743a858ba3SAnirudh Venkataramanan struct ice_aqc_vsi_props info; /* VSI properties */
3752946204bSMichal Swiatkowski struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */
3763a858ba3SAnirudh Venkataramanan
377fcea6f3dSAnirudh Venkataramanan /* VSI stats */
378fcea6f3dSAnirudh Venkataramanan struct rtnl_link_stats64 net_stats;
3792fd5e433SBenjamin Mikailenko struct rtnl_link_stats64 net_stats_prev;
380fcea6f3dSAnirudh Venkataramanan struct ice_eth_stats eth_stats;
381fcea6f3dSAnirudh Venkataramanan struct ice_eth_stats eth_stats_prev;
382fcea6f3dSAnirudh Venkataramanan
383e94d4478SAnirudh Venkataramanan struct list_head tmp_sync_list; /* MAC filters to be synced */
384e94d4478SAnirudh Venkataramanan struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
385e94d4478SAnirudh Venkataramanan
3860ab54c5fSJesse Brandeburg u8 irqs_ready:1;
3870ab54c5fSJesse Brandeburg u8 current_isup:1; /* Sync 'link up' logging */
3880ab54c5fSJesse Brandeburg u8 stat_offsets_loaded:1;
389c31af68aSBrett Creeley struct ice_vsi_vlan_ops inner_vlan_ops;
390c31af68aSBrett Creeley struct ice_vsi_vlan_ops outer_vlan_ops;
391cd6d6b83SBrett Creeley u16 num_vlan;
392cdedef59SAnirudh Venkataramanan
3933a858ba3SAnirudh Venkataramanan /* queue information */
3943a858ba3SAnirudh Venkataramanan u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
3953a858ba3SAnirudh Venkataramanan u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
39678b5713aSAnirudh Venkataramanan u16 *txq_map; /* index in pf->avail_txqs */
39778b5713aSAnirudh Venkataramanan u16 *rxq_map; /* index in pf->avail_rxqs */
3983a858ba3SAnirudh Venkataramanan u16 alloc_txq; /* Allocated Tx queues */
3993a858ba3SAnirudh Venkataramanan u16 num_txq; /* Used Tx queues */
4003a858ba3SAnirudh Venkataramanan u16 alloc_rxq; /* Allocated Rx queues */
4013a858ba3SAnirudh Venkataramanan u16 num_rxq; /* Used Rx queues */
40287324e74SHenry Tieman u16 req_txq; /* User requested Tx queues */
40387324e74SHenry Tieman u16 req_rxq; /* User requested Rx queues */
404ad71b256SBrett Creeley u16 num_rx_desc;
405ad71b256SBrett Creeley u16 num_tx_desc;
406348048e7SDave Ertman u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
4073a858ba3SAnirudh Venkataramanan struct ice_tc_cfg tc_cfg;
408efc2214bSMaciej Fijalkowski struct bpf_prog *xdp_prog;
409e72bba21SMaciej Fijalkowski struct ice_tx_ring **xdp_rings; /* XDP ring array */
410efc2214bSMaciej Fijalkowski u16 num_xdp_txq; /* Used XDP queues */
411efc2214bSMaciej Fijalkowski u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
412b126bd6bSKiran Patil
4131a1c40dfSGrzegorz Nitka struct net_device **target_netdevs;
4141a1c40dfSGrzegorz Nitka
4150754d65bSKiran Patil struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
4160754d65bSKiran Patil
4170754d65bSKiran Patil /* Channel Specific Fields */
4180754d65bSKiran Patil struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
4190754d65bSKiran Patil u16 cnt_q_avail;
4200754d65bSKiran Patil u16 next_base_q; /* next queue to be used for channel setup */
4210754d65bSKiran Patil struct list_head ch_list;
4220754d65bSKiran Patil u16 num_chnl_rxq;
4230754d65bSKiran Patil u16 num_chnl_txq;
4240754d65bSKiran Patil u16 ch_rss_size;
4259fea7498SKiran Patil u16 num_chnl_fltr;
4260754d65bSKiran Patil /* store away rss size info before configuring ADQ channels so that,
4270754d65bSKiran Patil * it can be used after tc-qdisc delete, to get back RSS setting as
4280754d65bSKiran Patil * they were before
4290754d65bSKiran Patil */
4300754d65bSKiran Patil u16 orig_rss_size;
4310754d65bSKiran Patil /* this keeps tracks of all enabled TC with and without DCB
4320754d65bSKiran Patil * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
4330754d65bSKiran Patil * information
4340754d65bSKiran Patil */
4350754d65bSKiran Patil u8 all_numtc;
4360754d65bSKiran Patil u16 all_enatc;
4370754d65bSKiran Patil
4380754d65bSKiran Patil /* store away TC info, to be used for rebuild logic */
4390754d65bSKiran Patil u8 old_numtc;
4400754d65bSKiran Patil u16 old_ena_tc;
4410754d65bSKiran Patil
4420754d65bSKiran Patil struct ice_channel *ch;
4430754d65bSKiran Patil
444b126bd6bSKiran Patil /* setup back reference, to which aggregator node this VSI
445b126bd6bSKiran Patil * corresponds to
446b126bd6bSKiran Patil */
447b126bd6bSKiran Patil struct ice_agg_node *agg_node;
4483a858ba3SAnirudh Venkataramanan } ____cacheline_internodealigned_in_smp;
4493a858ba3SAnirudh Venkataramanan
4503a858ba3SAnirudh Venkataramanan /* struct that defines an interrupt vector */
4513a858ba3SAnirudh Venkataramanan struct ice_q_vector {
4523a858ba3SAnirudh Venkataramanan struct ice_vsi *vsi;
4538244dd2dSBrett Creeley
4543a858ba3SAnirudh Venkataramanan u16 v_idx; /* index in the vsi->q_vector array. */
455b07833a0SBrett Creeley u16 reg_idx;
456d337f2afSAnirudh Venkataramanan u8 num_ring_rx; /* total number of Rx rings in vector */
4578244dd2dSBrett Creeley u8 num_ring_tx; /* total number of Tx rings in vector */
458cdf1f1f1SJacob Keller u8 wb_on_itr:1; /* if true, WB on ITR is enabled */
4599e4ab4c2SBrett Creeley /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
4609e4ab4c2SBrett Creeley * value to the device
4619e4ab4c2SBrett Creeley */
4629e4ab4c2SBrett Creeley u8 intrl;
4638244dd2dSBrett Creeley
4648244dd2dSBrett Creeley struct napi_struct napi;
4658244dd2dSBrett Creeley
4668244dd2dSBrett Creeley struct ice_ring_container rx;
4678244dd2dSBrett Creeley struct ice_ring_container tx;
4688244dd2dSBrett Creeley
4698244dd2dSBrett Creeley cpumask_t affinity_mask;
4708244dd2dSBrett Creeley struct irq_affinity_notify affinity_notify;
4718244dd2dSBrett Creeley
472fbc7b27aSKiran Patil struct ice_channel *ch;
473fbc7b27aSKiran Patil
4748244dd2dSBrett Creeley char name[ICE_INT_NAME_STR_LEN];
475cdf1f1f1SJacob Keller
476cdf1f1f1SJacob Keller u16 total_events; /* net_dim(): number of interrupts processed */
4774aad5335SPiotr Raczynski struct msi_map irq;
478940b61afSAnirudh Venkataramanan } ____cacheline_internodealigned_in_smp;
479940b61afSAnirudh Venkataramanan
480940b61afSAnirudh Venkataramanan enum ice_pf_flags {
481940b61afSAnirudh Venkataramanan ICE_FLAG_FLTR_SYNC,
482d25a0fc4SDave Ertman ICE_FLAG_RDMA_ENA,
483940b61afSAnirudh Venkataramanan ICE_FLAG_RSS_ENA,
484ddf30f7fSAnirudh Venkataramanan ICE_FLAG_SRIOV_ENA,
48575d2b253SAnirudh Venkataramanan ICE_FLAG_SRIOV_CAPABLE,
48637b6f646SAnirudh Venkataramanan ICE_FLAG_DCB_CAPABLE,
48737b6f646SAnirudh Venkataramanan ICE_FLAG_DCB_ENA,
488148beb61SHenry Tieman ICE_FLAG_FD_ENA,
48906c16d89SJacob Keller ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */
49006c16d89SJacob Keller ICE_FLAG_PTP, /* PTP is enabled by software */
491462acf6aSTony Nguyen ICE_FLAG_ADV_FEATURES,
4920754d65bSKiran Patil ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */
4930d08a441SKiran Patil ICE_FLAG_CLS_FLOWER,
494ab4ab73fSBruce Allan ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
495b4e813ddSBruce Allan ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
4966d599946STony Nguyen ICE_FLAG_NO_MEDIA,
49784a118abSDave Ertman ICE_FLAG_FW_LLDP_AGENT,
498c77849f5SAnirudh Venkataramanan ICE_FLAG_MOD_POWER_UNSUPPORTED,
49999d40752SBrett Creeley ICE_FLAG_PHY_FW_LOAD_FAILED,
5003a257a14SAnirudh Venkataramanan ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
5017237f5b0SMaciej Fijalkowski ICE_FLAG_LEGACY_RX,
50201b5e89aSBrett Creeley ICE_FLAG_VF_TRUE_PROMISC_ENA,
5039d5c5a52SPaul Greenwalt ICE_FLAG_MDD_AUTO_RESET_VF,
504f1da5a08SBrett Creeley ICE_FLAG_VF_VLAN_PRUNING,
505ea78ce4dSPaul Greenwalt ICE_FLAG_LINK_LENIENT_MODE_ENA,
5065dbbbd01SDave Ertman ICE_FLAG_PLUG_AUX_DEV,
507248401cbSDave Ertman ICE_FLAG_UNPLUG_AUX_DEV,
50897b01291SDave Ertman ICE_FLAG_MTU_CHANGED,
50943113ff7SKarol Kolacinski ICE_FLAG_GNSS, /* GNSS successfully initialized */
510940b61afSAnirudh Venkataramanan ICE_PF_FLAGS_NBITS /* must be last */
511940b61afSAnirudh Venkataramanan };
512940b61afSAnirudh Venkataramanan
5136e8b2c88SKarol Kolacinski enum ice_misc_thread_tasks {
5146e8b2c88SKarol Kolacinski ICE_MISC_THREAD_EXTTS_EVENT,
5156e8b2c88SKarol Kolacinski ICE_MISC_THREAD_TX_TSTAMP,
5166e8b2c88SKarol Kolacinski ICE_MISC_THREAD_NBITS /* must be last */
5176e8b2c88SKarol Kolacinski };
5186e8b2c88SKarol Kolacinski
5191a1c40dfSGrzegorz Nitka struct ice_switchdev_info {
5201a1c40dfSGrzegorz Nitka struct ice_vsi *control_vsi;
5211a1c40dfSGrzegorz Nitka struct ice_vsi *uplink_vsi;
522f6e8fb55SWojciech Drewek struct ice_esw_br_offloads *br_offloads;
5231a1c40dfSGrzegorz Nitka bool is_running;
5241a1c40dfSGrzegorz Nitka };
5251a1c40dfSGrzegorz Nitka
526b126bd6bSKiran Patil struct ice_agg_node {
527b126bd6bSKiran Patil u32 agg_id;
528b126bd6bSKiran Patil #define ICE_MAX_VSIS_IN_AGG_NODE 64
529b126bd6bSKiran Patil u32 num_vsis;
530b126bd6bSKiran Patil u8 valid;
531b126bd6bSKiran Patil };
532b126bd6bSKiran Patil
533837f08fdSAnirudh Venkataramanan struct ice_pf {
534837f08fdSAnirudh Venkataramanan struct pci_dev *pdev;
535eb0208ecSPreethi Banala
536dce730f1SJacob Keller struct devlink_region *nvm_region;
53778ad87daSJacob Keller struct devlink_region *sram_region;
5388d7aab35SJacob Keller struct devlink_region *devcaps_region;
539dce730f1SJacob Keller
5402ae0aa47SWojciech Drewek /* devlink port data */
5412ae0aa47SWojciech Drewek struct devlink_port devlink_port;
5422ae0aa47SWojciech Drewek
543eb0208ecSPreethi Banala /* OS reserved IRQ details */
544940b61afSAnirudh Venkataramanan struct msix_entry *msix_entries;
545cfebc0a3SPiotr Raczynski struct ice_irq_tracker irq_tracker;
546cbe66bfeSBrett Creeley /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
547cbe66bfeSBrett Creeley * number of MSIX vectors needed for all SR-IOV VFs from the number of
548cbe66bfeSBrett Creeley * MSIX vectors allowed on this PF.
549cbe66bfeSBrett Creeley */
550cbe66bfeSBrett Creeley u16 sriov_base_vector;
551eb0208ecSPreethi Banala
552148beb61SHenry Tieman u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */
553148beb61SHenry Tieman
554940b61afSAnirudh Venkataramanan struct ice_vsi **vsi; /* VSIs created by the driver */
555288ecf49SBenjamin Mikailenko struct ice_vsi_stats **vsi_stats;
556940b61afSAnirudh Venkataramanan struct ice_sw *first_sw; /* first switch created by firmware */
5573ea9bd5dSMichal Swiatkowski u16 eswitch_mode; /* current mode of eswitch */
558000773c0SJacob Keller struct ice_vfs vfs;
55940b24760SAnirudh Venkataramanan DECLARE_BITMAP(features, ICE_F_MAX);
5607e408e07SAnirudh Venkataramanan DECLARE_BITMAP(state, ICE_STATE_NBITS);
561940b61afSAnirudh Venkataramanan DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
5626e8b2c88SKarol Kolacinski DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);
56378b5713aSAnirudh Venkataramanan unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */
56478b5713aSAnirudh Venkataramanan unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */
565940b61afSAnirudh Venkataramanan unsigned long serv_tmr_period;
566940b61afSAnirudh Venkataramanan unsigned long serv_tmr_prev;
567940b61afSAnirudh Venkataramanan struct timer_list serv_tmr;
568940b61afSAnirudh Venkataramanan struct work_struct serv_task;
569940b61afSAnirudh Venkataramanan struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
570940b61afSAnirudh Venkataramanan struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
571b94b013eSDave Ertman struct mutex tc_mutex; /* lock to protect TC changes */
572486b9eeeSIvan Vecera struct mutex adev_mutex; /* lock to protect aux device access */
573bb52f42aSDave Ertman struct mutex lag_mutex; /* protect ice_lag struct in PF */
574837f08fdSAnirudh Venkataramanan u32 msg_enable;
57506c16d89SJacob Keller struct ice_ptp ptp;
576c7ef8221SArkadiusz Kubalewski struct gnss_serial *gnss_serial;
577c7ef8221SArkadiusz Kubalewski struct gnss_device *gnss_dev;
578d25a0fc4SDave Ertman u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */
579d25a0fc4SDave Ertman u16 rdma_base_vector;
580d69ea414SJacob Keller
581d69ea414SJacob Keller /* spinlock to protect the AdminQ wait list */
582d69ea414SJacob Keller spinlock_t aq_wait_lock;
583d69ea414SJacob Keller struct hlist_head aq_wait_list;
584d69ea414SJacob Keller wait_queue_head_t aq_wait_queue;
585399e27dbSJacob Keller bool fw_emp_reset_disabled;
586d69ea414SJacob Keller
5871c08052eSJacob Keller wait_queue_head_t reset_wait_queue;
5881c08052eSJacob Keller
589d76a60baSAnirudh Venkataramanan u32 hw_csum_rx_error;
59032d53c0aSAlexander Lobakin u32 oicr_err_reg;
5914aad5335SPiotr Raczynski struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */
59278b5713aSAnirudh Venkataramanan u16 max_pf_txqs; /* Total Tx queues PF wide */
59378b5713aSAnirudh Venkataramanan u16 max_pf_rxqs; /* Total Rx queues PF wide */
59488865fc4SKarol Kolacinski u16 num_lan_msix; /* Total MSIX vectors for base driver */
595f9867df6SAnirudh Venkataramanan u16 num_lan_tx; /* num LAN Tx queues setup */
596f9867df6SAnirudh Venkataramanan u16 num_lan_rx; /* num LAN Rx queues setup */
597940b61afSAnirudh Venkataramanan u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */
598940b61afSAnirudh Venkataramanan u16 num_alloc_vsi;
5990b28b702SAnirudh Venkataramanan u16 corer_count; /* Core reset count */
6000b28b702SAnirudh Venkataramanan u16 globr_count; /* Global reset count */
6010b28b702SAnirudh Venkataramanan u16 empr_count; /* EMP reset count */
6020b28b702SAnirudh Venkataramanan u16 pfr_count; /* PF reset count */
6030b28b702SAnirudh Venkataramanan
604769c500dSAkeem G Abodunrin u8 wol_ena : 1; /* software state of WoL */
605769c500dSAkeem G Abodunrin u32 wakeup_reason; /* last wakeup reason */
606fcea6f3dSAnirudh Venkataramanan struct ice_hw_port_stats stats;
607fcea6f3dSAnirudh Venkataramanan struct ice_hw_port_stats stats_prev;
608837f08fdSAnirudh Venkataramanan struct ice_hw hw;
6090ab54c5fSJesse Brandeburg u8 stat_prev_loaded:1; /* has previous stats been loaded */
610e523af4eSShiraz Saleem u8 rdma_mode;
6117b9ffc76SAnirudh Venkataramanan u16 dcbx_cap;
612b3969fd7SSudheer Mogilappagari u32 tx_timeout_count;
613b3969fd7SSudheer Mogilappagari unsigned long tx_timeout_last_recovery;
614b3969fd7SSudheer Mogilappagari u32 tx_timeout_recovery_level;
615940b61afSAnirudh Venkataramanan char int_name[ICE_INT_NAME_STR_LEN];
616d25a0fc4SDave Ertman struct auxiliary_device *adev;
617d25a0fc4SDave Ertman int aux_idx;
6180e674aebSAnirudh Venkataramanan u32 sw_int_count;
6199fea7498SKiran Patil /* count of tc_flower filters specific to channel (aka where filter
6209fea7498SKiran Patil * action is "hw_tc <tc_num>")
6219fea7498SKiran Patil */
6229fea7498SKiran Patil u16 num_dmac_chnl_fltrs;
6230d08a441SKiran Patil struct hlist_head tc_flower_fltr_list;
6240d08a441SKiran Patil
625e753df8fSMichal Jaron u64 supported_rxdids;
626e753df8fSMichal Jaron
6271a3571b5SPaul Greenwalt __le64 nvm_phy_type_lo; /* NVM PHY type low */
6281a3571b5SPaul Greenwalt __le64 nvm_phy_type_hi; /* NVM PHY type high */
629ea78ce4dSPaul Greenwalt struct ice_link_default_override_tlv link_dflt_override;
630df006dd4SDave Ertman struct ice_lag *lag; /* Link Aggregation information */
631b126bd6bSKiran Patil
6321a1c40dfSGrzegorz Nitka struct ice_switchdev_info switchdev;
633f6e8fb55SWojciech Drewek struct ice_esw_br_port *br_port;
6341a1c40dfSGrzegorz Nitka
635b126bd6bSKiran Patil #define ICE_INVALID_AGG_NODE_ID 0
636b126bd6bSKiran Patil #define ICE_PF_AGG_NODE_ID_START 1
637b126bd6bSKiran Patil #define ICE_MAX_PF_AGG_NODES 32
638b126bd6bSKiran Patil struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
639b126bd6bSKiran Patil #define ICE_VF_AGG_NODE_ID_START 65
640b126bd6bSKiran Patil #define ICE_MAX_VF_AGG_NODES 32
641b126bd6bSKiran Patil struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
642837f08fdSAnirudh Venkataramanan };
643940b61afSAnirudh Venkataramanan
644bb52f42aSDave Ertman extern struct workqueue_struct *ice_lag_wq;
645bb52f42aSDave Ertman
6463a858ba3SAnirudh Venkataramanan struct ice_netdev_priv {
6473a858ba3SAnirudh Venkataramanan struct ice_vsi *vsi;
64837165e3fSMichal Swiatkowski struct ice_repr *repr;
649195bb48fSMichal Swiatkowski /* indirect block callbacks on registered higher level devices
650195bb48fSMichal Swiatkowski * (e.g. tunnel devices)
651195bb48fSMichal Swiatkowski *
652195bb48fSMichal Swiatkowski * tc_indr_block_cb_priv_list is used to look up indirect callback
653195bb48fSMichal Swiatkowski * private data
654195bb48fSMichal Swiatkowski */
655195bb48fSMichal Swiatkowski struct list_head tc_indr_block_priv_list;
6563a858ba3SAnirudh Venkataramanan };
6573a858ba3SAnirudh Venkataramanan
658940b61afSAnirudh Venkataramanan /**
659fbc7b27aSKiran Patil * ice_vector_ch_enabled
660fbc7b27aSKiran Patil * @qv: pointer to q_vector, can be NULL
661fbc7b27aSKiran Patil *
662fbc7b27aSKiran Patil * This function returns true if vector is channel enabled otherwise false
663fbc7b27aSKiran Patil */
ice_vector_ch_enabled(struct ice_q_vector * qv)664fbc7b27aSKiran Patil static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
665fbc7b27aSKiran Patil {
666fbc7b27aSKiran Patil return !!qv->ch; /* Enable it to run with TC */
667fbc7b27aSKiran Patil }
668fbc7b27aSKiran Patil
669fbc7b27aSKiran Patil /**
670940b61afSAnirudh Venkataramanan * ice_irq_dynamic_ena - Enable default interrupt generation settings
671f9867df6SAnirudh Venkataramanan * @hw: pointer to HW struct
672f9867df6SAnirudh Venkataramanan * @vsi: pointer to VSI struct, can be NULL
673cdedef59SAnirudh Venkataramanan * @q_vector: pointer to q_vector, can be NULL
674940b61afSAnirudh Venkataramanan */
675c8b7abddSBruce Allan static inline void
ice_irq_dynamic_ena(struct ice_hw * hw,struct ice_vsi * vsi,struct ice_q_vector * q_vector)676c8b7abddSBruce Allan ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
677cdedef59SAnirudh Venkataramanan struct ice_q_vector *q_vector)
678940b61afSAnirudh Venkataramanan {
679b07833a0SBrett Creeley u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
6804aad5335SPiotr Raczynski ((struct ice_pf *)hw->back)->oicr_irq.index;
681940b61afSAnirudh Venkataramanan int itr = ICE_ITR_NONE;
682940b61afSAnirudh Venkataramanan u32 val;
683940b61afSAnirudh Venkataramanan
684940b61afSAnirudh Venkataramanan /* clear the PBA here, as this function is meant to clean out all
685940b61afSAnirudh Venkataramanan * previous interrupts and enable the interrupt
686940b61afSAnirudh Venkataramanan */
687940b61afSAnirudh Venkataramanan val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
688940b61afSAnirudh Venkataramanan (itr << GLINT_DYN_CTL_ITR_INDX_S);
689cdedef59SAnirudh Venkataramanan if (vsi)
690e97fb1aeSAnirudh Venkataramanan if (test_bit(ICE_VSI_DOWN, vsi->state))
691cdedef59SAnirudh Venkataramanan return;
692940b61afSAnirudh Venkataramanan wr32(hw, GLINT_DYN_CTL(vector), val);
693940b61afSAnirudh Venkataramanan }
694cdedef59SAnirudh Venkataramanan
695c2a23e00SBrett Creeley /**
696462acf6aSTony Nguyen * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
697462acf6aSTony Nguyen * @netdev: pointer to the netdev struct
698462acf6aSTony Nguyen */
ice_netdev_to_pf(struct net_device * netdev)699462acf6aSTony Nguyen static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
700462acf6aSTony Nguyen {
701462acf6aSTony Nguyen struct ice_netdev_priv *np = netdev_priv(netdev);
702462acf6aSTony Nguyen
703462acf6aSTony Nguyen return np->vsi->back;
704462acf6aSTony Nguyen }
705462acf6aSTony Nguyen
ice_is_xdp_ena_vsi(struct ice_vsi * vsi)706efc2214bSMaciej Fijalkowski static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
707efc2214bSMaciej Fijalkowski {
708f9124c68SMaciej Fijalkowski return !!READ_ONCE(vsi->xdp_prog);
709efc2214bSMaciej Fijalkowski }
710efc2214bSMaciej Fijalkowski
ice_set_ring_xdp(struct ice_tx_ring * ring)711e72bba21SMaciej Fijalkowski static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
712efc2214bSMaciej Fijalkowski {
713efc2214bSMaciej Fijalkowski ring->flags |= ICE_TX_FLAGS_RING_XDP;
714efc2214bSMaciej Fijalkowski }
715efc2214bSMaciej Fijalkowski
716462acf6aSTony Nguyen /**
717eab834acSLarysa Zaremba * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID
718eab834acSLarysa Zaremba * @vsi: pointer to VSI
719eab834acSLarysa Zaremba * @qid: index of a queue to look at XSK buff pool presence
720eab834acSLarysa Zaremba *
721eab834acSLarysa Zaremba * Return: A pointer to xsk_buff_pool structure if there is a buffer pool
722eab834acSLarysa Zaremba * attached and configured as zero-copy, NULL otherwise.
723eab834acSLarysa Zaremba */
ice_get_xp_from_qid(struct ice_vsi * vsi,u16 qid)724eab834acSLarysa Zaremba static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi,
725eab834acSLarysa Zaremba u16 qid)
726eab834acSLarysa Zaremba {
727eab834acSLarysa Zaremba struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid);
728eab834acSLarysa Zaremba
729eab834acSLarysa Zaremba if (!ice_is_xdp_ena_vsi(vsi))
730eab834acSLarysa Zaremba return NULL;
731eab834acSLarysa Zaremba
732eab834acSLarysa Zaremba return (pool && pool->dev) ? pool : NULL;
733eab834acSLarysa Zaremba }
734eab834acSLarysa Zaremba
735eab834acSLarysa Zaremba /**
7361742b3d5SMagnus Karlsson * ice_xsk_pool - get XSK buffer pool bound to a ring
737e72bba21SMaciej Fijalkowski * @ring: Rx ring to use
7382d4238f5SKrzysztof Kazimierczak *
7399ead7e74SMaciej Fijalkowski * Returns a pointer to xsk_buff_pool structure if there is a buffer pool
7409ead7e74SMaciej Fijalkowski * present, NULL otherwise.
7412d4238f5SKrzysztof Kazimierczak */
ice_xsk_pool(struct ice_rx_ring * ring)742e72bba21SMaciej Fijalkowski static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
7432d4238f5SKrzysztof Kazimierczak {
744e102db78SMaciej Fijalkowski struct ice_vsi *vsi = ring->vsi;
74565bb559bSKrzysztof Kazimierczak u16 qid = ring->q_index;
7462d4238f5SKrzysztof Kazimierczak
747eab834acSLarysa Zaremba return ice_get_xp_from_qid(vsi, qid);
748e72bba21SMaciej Fijalkowski }
749e72bba21SMaciej Fijalkowski
750e72bba21SMaciej Fijalkowski /**
7519ead7e74SMaciej Fijalkowski * ice_tx_xsk_pool - assign XSK buff pool to XDP ring
7529ead7e74SMaciej Fijalkowski * @vsi: pointer to VSI
7539ead7e74SMaciej Fijalkowski * @qid: index of a queue to look at XSK buff pool presence
754e72bba21SMaciej Fijalkowski *
7559ead7e74SMaciej Fijalkowski * Sets XSK buff pool pointer on XDP ring.
7569ead7e74SMaciej Fijalkowski *
7579ead7e74SMaciej Fijalkowski * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided
7589ead7e74SMaciej Fijalkowski * queue id. Reason for doing so is that queue vectors might have assigned more
7599ead7e74SMaciej Fijalkowski * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring
7609ead7e74SMaciej Fijalkowski * carries a pointer to one of these XDP rings for its own purposes, such as
7619ead7e74SMaciej Fijalkowski * handling XDP_TX action, therefore we can piggyback here on the
7629ead7e74SMaciej Fijalkowski * rx_ring->xdp_ring assignment that was done during XDP rings initialization.
763e72bba21SMaciej Fijalkowski */
ice_tx_xsk_pool(struct ice_vsi * vsi,u16 qid)7649ead7e74SMaciej Fijalkowski static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)
765e72bba21SMaciej Fijalkowski {
7669ead7e74SMaciej Fijalkowski struct ice_tx_ring *ring;
767e72bba21SMaciej Fijalkowski
7689ead7e74SMaciej Fijalkowski ring = vsi->rx_rings[qid]->xdp_ring;
7699ead7e74SMaciej Fijalkowski if (!ring)
7709ead7e74SMaciej Fijalkowski return;
7712d4238f5SKrzysztof Kazimierczak
772eab834acSLarysa Zaremba ring->xsk_pool = ice_get_xp_from_qid(vsi, qid);
7732d4238f5SKrzysztof Kazimierczak }
7742d4238f5SKrzysztof Kazimierczak
7752d4238f5SKrzysztof Kazimierczak /**
776208ff751SAnirudh Venkataramanan * ice_get_main_vsi - Get the PF VSI
777208ff751SAnirudh Venkataramanan * @pf: PF instance
778208ff751SAnirudh Venkataramanan *
779208ff751SAnirudh Venkataramanan * returns pf->vsi[0], which by definition is the PF VSI
780c2a23e00SBrett Creeley */
ice_get_main_vsi(struct ice_pf * pf)781208ff751SAnirudh Venkataramanan static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
782c2a23e00SBrett Creeley {
783208ff751SAnirudh Venkataramanan if (pf->vsi)
784208ff751SAnirudh Venkataramanan return pf->vsi[0];
785c2a23e00SBrett Creeley
786c2a23e00SBrett Creeley return NULL;
787c2a23e00SBrett Creeley }
788c2a23e00SBrett Creeley
789148beb61SHenry Tieman /**
7907aae80ceSWojciech Drewek * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
7917aae80ceSWojciech Drewek * @np: private netdev structure
7927aae80ceSWojciech Drewek */
ice_get_netdev_priv_vsi(struct ice_netdev_priv * np)7937aae80ceSWojciech Drewek static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
7947aae80ceSWojciech Drewek {
7957aae80ceSWojciech Drewek /* In case of port representor return source port VSI. */
7967aae80ceSWojciech Drewek if (np->repr)
7977aae80ceSWojciech Drewek return np->repr->src_vsi;
7987aae80ceSWojciech Drewek else
7997aae80ceSWojciech Drewek return np->vsi;
8007aae80ceSWojciech Drewek }
8017aae80ceSWojciech Drewek
8027aae80ceSWojciech Drewek /**
803148beb61SHenry Tieman * ice_get_ctrl_vsi - Get the control VSI
804148beb61SHenry Tieman * @pf: PF instance
805148beb61SHenry Tieman */
ice_get_ctrl_vsi(struct ice_pf * pf)806148beb61SHenry Tieman static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
807148beb61SHenry Tieman {
808148beb61SHenry Tieman /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
809148beb61SHenry Tieman if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
810148beb61SHenry Tieman return NULL;
811148beb61SHenry Tieman
812148beb61SHenry Tieman return pf->vsi[pf->ctrl_vsi_idx];
813148beb61SHenry Tieman }
814148beb61SHenry Tieman
815df006dd4SDave Ertman /**
816295819b5SMaciej Fijalkowski * ice_find_vsi - Find the VSI from VSI ID
817295819b5SMaciej Fijalkowski * @pf: The PF pointer to search in
818295819b5SMaciej Fijalkowski * @vsi_num: The VSI ID to search for
819295819b5SMaciej Fijalkowski */
ice_find_vsi(struct ice_pf * pf,u16 vsi_num)820295819b5SMaciej Fijalkowski static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
821295819b5SMaciej Fijalkowski {
822295819b5SMaciej Fijalkowski int i;
823295819b5SMaciej Fijalkowski
824295819b5SMaciej Fijalkowski ice_for_each_vsi(pf, i)
825295819b5SMaciej Fijalkowski if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
826295819b5SMaciej Fijalkowski return pf->vsi[i];
827295819b5SMaciej Fijalkowski return NULL;
828295819b5SMaciej Fijalkowski }
829295819b5SMaciej Fijalkowski
830295819b5SMaciej Fijalkowski /**
8311a1c40dfSGrzegorz Nitka * ice_is_switchdev_running - check if switchdev is configured
8321a1c40dfSGrzegorz Nitka * @pf: pointer to PF structure
8331a1c40dfSGrzegorz Nitka *
8341a1c40dfSGrzegorz Nitka * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
8351a1c40dfSGrzegorz Nitka * and switchdev is configured, false otherwise.
8361a1c40dfSGrzegorz Nitka */
ice_is_switchdev_running(struct ice_pf * pf)8371a1c40dfSGrzegorz Nitka static inline bool ice_is_switchdev_running(struct ice_pf *pf)
8381a1c40dfSGrzegorz Nitka {
8391a1c40dfSGrzegorz Nitka return pf->switchdev.is_running;
8401a1c40dfSGrzegorz Nitka }
8411a1c40dfSGrzegorz Nitka
8424ab95646SHenry Tieman #define ICE_FD_STAT_CTR_BLOCK_COUNT 256
8434ab95646SHenry Tieman #define ICE_FD_STAT_PF_IDX(base_idx) \
8444ab95646SHenry Tieman ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
8454ab95646SHenry Tieman #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
84640319796SKiran Patil #define ICE_FD_STAT_CH 1
84740319796SKiran Patil #define ICE_FD_CH_STAT_IDX(base_idx) \
84840319796SKiran Patil (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
8494ab95646SHenry Tieman
8500754d65bSKiran Patil /**
8510754d65bSKiran Patil * ice_is_adq_active - any active ADQs
8520754d65bSKiran Patil * @pf: pointer to PF
8530754d65bSKiran Patil *
8540754d65bSKiran Patil * This function returns true if there are any ADQs configured (which is
8550754d65bSKiran Patil * determined by looking at VSI type (which should be VSI_PF), numtc, and
8560754d65bSKiran Patil * TC_MQPRIO flag) otherwise return false
8570754d65bSKiran Patil */
ice_is_adq_active(struct ice_pf * pf)8580754d65bSKiran Patil static inline bool ice_is_adq_active(struct ice_pf *pf)
8590754d65bSKiran Patil {
8600754d65bSKiran Patil struct ice_vsi *vsi;
8610754d65bSKiran Patil
8620754d65bSKiran Patil vsi = ice_get_main_vsi(pf);
8630754d65bSKiran Patil if (!vsi)
8640754d65bSKiran Patil return false;
8650754d65bSKiran Patil
8660754d65bSKiran Patil /* is ADQ configured */
8670754d65bSKiran Patil if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
8680754d65bSKiran Patil test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
8690754d65bSKiran Patil return true;
8700754d65bSKiran Patil
8710754d65bSKiran Patil return false;
8720754d65bSKiran Patil }
8730754d65bSKiran Patil
874f6e8fb55SWojciech Drewek bool netif_is_ice(const struct net_device *dev);
8750e674aebSAnirudh Venkataramanan int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
8760e674aebSAnirudh Venkataramanan int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
877148beb61SHenry Tieman int ice_vsi_open_ctrl(struct ice_vsi *vsi);
8781a1c40dfSGrzegorz Nitka int ice_vsi_open(struct ice_vsi *vsi);
879fcea6f3dSAnirudh Venkataramanan void ice_set_ethtool_ops(struct net_device *netdev);
8807aae80ceSWojciech Drewek void ice_set_ethtool_repr_ops(struct net_device *netdev);
881462acf6aSTony Nguyen void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
8828c243700SAnirudh Venkataramanan u16 ice_get_avail_txq_count(struct ice_pf *pf);
8838c243700SAnirudh Venkataramanan u16 ice_get_avail_rxq_count(struct ice_pf *pf);
884a6a0974aSDave Ertman int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
8855a4a8673SBruce Allan void ice_update_vsi_stats(struct ice_vsi *vsi);
8865a4a8673SBruce Allan void ice_update_pf_stats(struct ice_pf *pf);
887c8ff29b5SMarcin Szycik void
888c8ff29b5SMarcin Szycik ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
889c8ff29b5SMarcin Szycik struct ice_q_stats stats, u64 *pkts, u64 *bytes);
890fcea6f3dSAnirudh Venkataramanan int ice_up(struct ice_vsi *vsi);
891fcea6f3dSAnirudh Venkataramanan int ice_down(struct ice_vsi *vsi);
892dddd406dSJesse Brandeburg int ice_down_up(struct ice_vsi *vsi);
8930db66d20SMichal Swiatkowski int ice_vsi_cfg_lan(struct ice_vsi *vsi);
8940e674aebSAnirudh Venkataramanan struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
895649b63f5SLarysa Zaremba
896649b63f5SLarysa Zaremba enum ice_xdp_cfg {
897649b63f5SLarysa Zaremba ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */
898649b63f5SLarysa Zaremba ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */
899649b63f5SLarysa Zaremba };
900649b63f5SLarysa Zaremba
90122bf877eSMaciej Fijalkowski int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
902649b63f5SLarysa Zaremba int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
903649b63f5SLarysa Zaremba enum ice_xdp_cfg cfg_type);
904649b63f5SLarysa Zaremba int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type);
905efc2214bSMaciej Fijalkowski int
906efc2214bSMaciej Fijalkowski ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
907efc2214bSMaciej Fijalkowski u32 flags);
908b66a972aSBrett Creeley int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
909b66a972aSBrett Creeley int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
910b66a972aSBrett Creeley int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
911b66a972aSBrett Creeley int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
912d76a60baSAnirudh Venkataramanan void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
91387324e74SHenry Tieman int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
914fcea6f3dSAnirudh Venkataramanan void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
915f9f5301eSDave Ertman int ice_plug_aux_dev(struct ice_pf *pf);
916f9f5301eSDave Ertman void ice_unplug_aux_dev(struct ice_pf *pf);
917d25a0fc4SDave Ertman int ice_init_rdma(struct ice_pf *pf);
9182b8db6afSMichal Swiatkowski void ice_deinit_rdma(struct ice_pf *pf);
9190fee3577SLihong Yang const char *ice_aq_str(enum ice_aq_err aq_err);
92031765519SAnirudh Venkataramanan bool ice_is_wol_supported(struct ice_hw *hw);
92140319796SKiran Patil void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
92228bf2672SBrett Creeley int
92328bf2672SBrett Creeley ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
92428bf2672SBrett Creeley bool is_tun);
925148beb61SHenry Tieman void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
926cac2a27cSHenry Tieman int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
927cac2a27cSHenry Tieman int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
9284ab95646SHenry Tieman int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
9294ab95646SHenry Tieman int
9304ab95646SHenry Tieman ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
9314ab95646SHenry Tieman u32 *rule_locs);
93240319796SKiran Patil void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
933148beb61SHenry Tieman void ice_fdir_release_flows(struct ice_hw *hw);
93483af0039SHenry Tieman void ice_fdir_replay_flows(struct ice_hw *hw);
93583af0039SHenry Tieman void ice_fdir_replay_fltrs(struct ice_pf *pf);
936148beb61SHenry Tieman int ice_fdir_create_dflt_rules(struct ice_pf *pf);
937b214b98aSPrzemek Kitszel
938b214b98aSPrzemek Kitszel enum ice_aq_task_state {
939fb9840c4SPrzemek Kitszel ICE_AQ_TASK_NOT_PREPARED,
940b214b98aSPrzemek Kitszel ICE_AQ_TASK_WAITING,
941b214b98aSPrzemek Kitszel ICE_AQ_TASK_COMPLETE,
942b214b98aSPrzemek Kitszel ICE_AQ_TASK_CANCELED,
943b214b98aSPrzemek Kitszel };
944b214b98aSPrzemek Kitszel
945b214b98aSPrzemek Kitszel struct ice_aq_task {
946b214b98aSPrzemek Kitszel struct hlist_node entry;
947b214b98aSPrzemek Kitszel struct ice_rq_event_info event;
948b214b98aSPrzemek Kitszel enum ice_aq_task_state state;
949b214b98aSPrzemek Kitszel u16 opcode;
950b214b98aSPrzemek Kitszel };
951b214b98aSPrzemek Kitszel
952fb9840c4SPrzemek Kitszel void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task,
953fb9840c4SPrzemek Kitszel u16 opcode);
954b214b98aSPrzemek Kitszel int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
955fb9840c4SPrzemek Kitszel unsigned long timeout);
9560e674aebSAnirudh Venkataramanan int ice_open(struct net_device *netdev);
957e95fc857SKrzysztof Goreczny int ice_open_internal(struct net_device *netdev);
9580e674aebSAnirudh Venkataramanan int ice_stop(struct net_device *netdev);
95928bf2672SBrett Creeley void ice_service_task_schedule(struct ice_pf *pf);
9605b246e53SMichal Swiatkowski int ice_load(struct ice_pf *pf);
9615b246e53SMichal Swiatkowski void ice_unload(struct ice_pf *pf);
962d76a60baSAnirudh Venkataramanan
963d25a0fc4SDave Ertman /**
964d25a0fc4SDave Ertman * ice_set_rdma_cap - enable RDMA support
965d25a0fc4SDave Ertman * @pf: PF struct
966d25a0fc4SDave Ertman */
ice_set_rdma_cap(struct ice_pf * pf)967d25a0fc4SDave Ertman static inline void ice_set_rdma_cap(struct ice_pf *pf)
968d25a0fc4SDave Ertman {
969f9f5301eSDave Ertman if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
970d25a0fc4SDave Ertman set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
9715dbbbd01SDave Ertman set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
972f9f5301eSDave Ertman }
973d25a0fc4SDave Ertman }
974d25a0fc4SDave Ertman
975d25a0fc4SDave Ertman /**
976d25a0fc4SDave Ertman * ice_clear_rdma_cap - disable RDMA support
977d25a0fc4SDave Ertman * @pf: PF struct
978d25a0fc4SDave Ertman */
ice_clear_rdma_cap(struct ice_pf * pf)979d25a0fc4SDave Ertman static inline void ice_clear_rdma_cap(struct ice_pf *pf)
980d25a0fc4SDave Ertman {
981248401cbSDave Ertman /* defer unplug to service task to avoid RTNL lock and
982248401cbSDave Ertman * clear PLUG bit so that pending plugs don't interfere
9835cb1ebdbSIvan Vecera */
984248401cbSDave Ertman clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
985248401cbSDave Ertman set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
986d25a0fc4SDave Ertman clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
987d25a0fc4SDave Ertman }
988837f08fdSAnirudh Venkataramanan #endif /* _ICE_H_ */
989