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Searched refs:tcg_constant_i64 (Results 1 – 25 of 40) sorted by relevance

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/openbmc/qemu/target/arm/tcg/
H A Dgengvec64.c198 TCGv_i64 max = tcg_constant_i64((1ull << ((8 << esz) - 1)) - 1); in gen_suqadd_bhs()
209 TCGv_i64 max = tcg_constant_i64(INT64_MAX); in gen_suqadd_d()
281 TCGv_i64 max = tcg_constant_i64(MAKE_64BIT_MASK(0, 8 << esz)); in gen_usqadd_bhs()
282 TCGv_i64 zero = tcg_constant_i64(0); in gen_usqadd_bhs()
297 TCGv_i64 max = tcg_constant_i64(UINT64_MAX); in gen_usqadd_d()
298 TCGv_i64 zero = tcg_constant_i64(0); in gen_usqadd_d()
H A Dgengvec.c1040 TCGv_i64 zero = tcg_constant_i64(0); in gen_ushl_i64()
1041 TCGv_i64 max = tcg_constant_i64(64); in gen_ushl_i64()
1158 TCGv_i64 zero = tcg_constant_i64(0); in gen_sshl_i64()
1159 TCGv_i64 max = tcg_constant_i64(63); in gen_sshl_i64()
1358 tcg_gen_umin_i64(res, tmp, tcg_constant_i64(max)); in gen_uqadd_bhs()
1369 tcg_constant_i64(UINT64_MAX), t); in gen_uqadd_d()
1426 tcg_gen_smin_i64(res, tmp, tcg_constant_i64(max)); in gen_sqadd_bhs()
1427 tcg_gen_smax_i64(res, res, tcg_constant_i64(min)); in gen_sqadd_bhs()
1449 tcg_gen_movcond_i64(TCG_COND_LT, res, t1, tcg_constant_i64(0), t2, t0); in gen_sqadd_d()
1504 tcg_gen_smax_i64(res, tmp, tcg_constant_i64(0)); in gen_uqsub_bhs()
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H A Dtranslate-a64.c913 TCGv_i64 zero = tcg_constant_i64(0); in gen_adc_CC()
1606 dst = auth_branch_target(s, cpu_reg(s, a->rn), tcg_constant_i64(0), !a->m); in trans_BRAZ()
1621 dst = auth_branch_target(s, cpu_reg(s, a->rn), tcg_constant_i64(0), !a->m); in trans_BLRAZ()
1875 gen_helper_pacia(cpu_X[30], tcg_env, cpu_X[30], tcg_constant_i64(0)); in trans_PACIAZ()
1891 gen_helper_pacib(cpu_X[30], tcg_env, cpu_X[30], tcg_constant_i64(0)); in trans_PACIBZ()
1907 gen_helper_autia(cpu_X[30], tcg_env, cpu_X[30], tcg_constant_i64(0)); in trans_AUTIAZ()
1923 gen_helper_autib(cpu_X[30], tcg_env, cpu_X[30], tcg_constant_i64(0)); in trans_AUTIBZ()
3603 tcg_constant_i64(0)); in trans_LDRA()
3606 tcg_constant_i64(0)); in trans_LDRA()
3741 tcg_ebytes = tcg_constant_i64(1 << size); in trans_LD_mult()
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H A Dtranslate-sve.c1125 tcg_constant_i64(a->imm1), tcg_constant_i64(a->imm2))
1127 tcg_constant_i64(a->imm), cpu_reg(s, a->rm))
1129 cpu_reg(s, a->rn), tcg_constant_i64(a->imm))
1751 tcg_gen_smax_i64(reg, reg, tcg_constant_i64(ibound)); in TRANS_FEAT()
1755 tcg_gen_smin_i64(reg, reg, tcg_constant_i64(ibound)); in TRANS_FEAT()
1768 t2 = tcg_constant_i64(0); in do_sat_addsub_64()
1772 t2 = tcg_constant_i64(-1); in do_sat_addsub_64()
1786 t2 = tcg_constant_i64(0); in do_sat_addsub_64()
1797 t2 = tcg_constant_i64(0); in do_sat_addsub_64()
1931 do_sat_addsub_32(reg, tcg_constant_i64(inc), a->u, a->d); in trans_SINCDEC_r_32()
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H A Dtranslate-m-nocp.c173 zero = tcg_constant_i64(0); in trans_VSCCLRM()
H A Dtranslate-mve.c1183 rda_i = tcg_constant_i64(0); in DO_2OP_FP_SCALAR()
1469 rda_i = tcg_constant_i64(0); in trans_VADDLV()
1511 fn(tcg_env, qd, tcg_constant_i64(imm)); in do_1imm()
/openbmc/qemu/target/hexagon/
H A Dgenptr.c385 one = tcg_constant_i64(0xff); in gen_store_conditional8()
386 zero = tcg_constant_i64(0); in gen_store_conditional8()
459 TCGv_i64 tmp = tcg_constant_i64(src); in gen_store8i()
1122 tcg_gen_shl_i64(mask, tcg_constant_i64(1), mask); in gen_insert_rp()
1300 TCGv_i64 zero = tcg_constant_i64(0); in vec_to_qvec()
1301 TCGv_i64 ones = tcg_constant_i64(~0); in vec_to_qvec()
1381 TCGv_i64 max_val = tcg_constant_i64((1LL << (width - 1)) - 1LL); in gen_sat_i64()
1382 TCGv_i64 min_val = tcg_constant_i64(-(1LL << (width - 1))); in gen_sat_i64()
1401 TCGv_i64 max_val = tcg_constant_i64((1LL << width) - 1LL); in gen_satu_i64()
1402 TCGv_i64 zero = tcg_constant_i64(0); in gen_satu_i64()
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H A Dgen_tcg.h644 TCGv_i64 zero = tcg_constant_i64(0); \
657 TCGv_i64 zero = tcg_constant_i64(0); \
/openbmc/qemu/tcg/
H A Dtcg-op.c1500 tcg_gen_mov_i64(ret, tcg_constant_i64(arg)); in tcg_gen_movi_i64()
1734 tcg_gen_add_i64(ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_addi_i64()
1747 tcg_gen_sub_i64(ret, tcg_constant_i64(arg1), arg2); in tcg_gen_subfi_i64()
1808 tcg_gen_and_i64(ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_andi_i64()
1824 tcg_gen_or_i64(ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_ori_i64()
1842 tcg_gen_xor_i64(ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_xori_i64()
1904 tcg_gen_shl_i64(ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_shli_i64()
1916 tcg_gen_shr_i64(ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_shri_i64()
1928 tcg_gen_sar_i64(ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_sari_i64()
1953 tcg_gen_brcond_i64(cond, arg1, tcg_constant_i64(arg2), l); in tcg_gen_brcondi_i64()
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H A Dtcg-op-gvec.c611 t_64 = tcg_constant_i64(in_c); in do_dup()
671 t_64 = tcg_constant_i64(in_c); in do_dup()
1312 TCGv_i64 tcg_c = tcg_constant_i64(c); in tcg_gen_gvec_2i()
1874 TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80)); in tcg_gen_vec_add8_i64()
1899 TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000)); in tcg_gen_vec_add16_i64()
1998 TCGv_i64 tmp = tcg_constant_i64(c); in tcg_gen_gvec_addi()
2057 TCGv_i64 m = tcg_constant_i64(dup_const(MO_8, 0x80)); in tcg_gen_vec_sub8_i64()
2082 TCGv_i64 m = tcg_constant_i64(dup_const(MO_16, 0x8000)); in tcg_gen_vec_sub16_i64()
2208 TCGv_i64 tmp = tcg_constant_i64(c); in tcg_gen_gvec_muli()
2273 TCGv_i64 max = tcg_constant_i64(-1); in tcg_gen_usadd_i64()
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/openbmc/qemu/target/ppc/translate/
H A Dvsx-impl.c.inc150 TCGv_i64 mask = tcg_constant_i64(0x00FF00FF00FF00FF);
624 set_cpu_vsr(xT(ctx->opcode), tcg_constant_i64(0), false); \
971 set_cpu_vsr(xT(ctx->opcode), tcg_constant_i64(0), false); \
1116 set_cpu_vsr(a->xt, tcg_constant_i64(0), true);
1117 set_cpu_vsr(a->xt, tcg_constant_i64(0), false);
1197 set_cpu_vsr(a->xt, tcg_constant_i64(0), false);
1737 set_cpu_vsr(a->xt, tcg_constant_i64(0x0), false);
1738 set_cpu_vsr(a->xt, tcg_constant_i64(values[a->uim]), true);
1758 mask = tcg_constant_i64(dup_const(MO_8, 1));
1759 zero = tcg_constant_i64(0);
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H A Dvmx-impl.c.inc162 ten = tcg_constant_i64(10);
163 z = tcg_constant_i64(0);
882 TCGv_i64 hi, lo, t0, t1, n, zero = tcg_constant_i64(0);
947 TCGv_i64 th, tl, t0, t1, zero = tcg_constant_i64(0),
948 ones = tcg_constant_i64(-1);
995 TCGv_i64 ah, al, vrb, n, t0, t1, zero = tcg_constant_i64(0);
1271 tcg_gen_negsetcond_i64(TCG_COND_EQ, t1, t1, tcg_constant_i64(0));
1298 tcg_gen_movcond_i64(TCG_COND_EQ, t2, t0, t1, t2, tcg_constant_i64(0));
1475 tcg_gen_and_i64(t, t, tcg_constant_i64(1));
2156 set_avr64(a->vrt, tcg_constant_i64(hi), true);
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H A Dfp-impl.c.inc547 store_fpscr_masked(fpscr, FP_ENABLES, tcg_constant_i64(0), 0x0003);
718 t0 = tcg_constant_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh));
/openbmc/qemu/target/riscv/
H A Dtranslate.c200 TCGv_i64 t_max = tcg_constant_i64(0xffffffffffff0000ull); in gen_check_nanbox_h()
201 TCGv_i64 t_nan = tcg_constant_i64(0xffffffffffff7e00ull); in gen_check_nanbox_h()
208 TCGv_i64 t_max = tcg_constant_i64(0xffffffff00000000ull); in gen_check_nanbox_s()
209 TCGv_i64 t_nan = tcg_constant_i64(0xffffffff7fc00000ull); in gen_check_nanbox_s()
447 return tcg_constant_i64(0); in get_fpr_hs()
474 return tcg_constant_i64(0); in get_fpr_d()
/openbmc/qemu/target/alpha/
H A Dtranslate.c167 ctx->zero = tcg_constant_i64(0); in load_zero()
201 return tcg_constant_i64(lit); in load_gpr_lit()
517 src, tcg_constant_i64(INT64_MIN), in gen_fold_mzero()
518 tcg_constant_i64(0), src); in gen_fold_mzero()
539 tmp, tcg_constant_i64(imm), in gen_fcmov()
766 TCGv vmask = tcg_constant_i64(mask); in IEEE_INTCVT()
1036 st_flag_byte(tcg_constant_i64(set), ENV_FLAG_RX_SHIFT); in gen_rx()
1163 st_flag_byte(tcg_constant_i64(1), ENV_FLAG_PAL_SHIFT); in gen_call_pal()
1675 tcg_gen_movcond_i64(TCG_COND_TSTNE, vc, va, tcg_constant_i64(1), in translate_one()
1680 tcg_gen_movcond_i64(TCG_COND_TSTEQ, vc, va, tcg_constant_i64(1), in translate_one()
/openbmc/qemu/target/s390x/tcg/
H A Dtranslate.c180 tcg_gen_deposit_i64(out, out, tcg_constant_i64(pc), 0, 32); in pc_to_link_info()
551 dummy = tcg_constant_i64(0); in gen_op_calc_cc()
826 c->u.s64.b = tcg_constant_i64(0); in disas_jcc()
841 c->u.s64.b = tcg_constant_i64(0); in disas_jcc()
1079 per_branch(s, tcg_constant_i64(dest)); in help_goto_direct()
1253 TCGv_i64 zero = tcg_constant_i64(0); in op_addc64()
1558 c.u.s64.b = tcg_constant_i64(0); in op_bct64()
2346 v1 = tcg_constant_i64(0); in op_ex()
2853 z = tcg_constant_i64(0); in op_loc()
3416 TCGv_i64 z = tcg_constant_i64(0); in op_nabs()
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H A Dtranslate_vx.c.inc304 TCGv_i64 bl = tcg_constant_i64(b);
305 TCGv_i64 bh = tcg_constant_i64(0);
495 write_vec_element_i64(tcg_constant_i64(0), get_field(s, v1), 1, ES_64);
580 tmp = tcg_constant_i64((int16_t)get_field(s, i2));
1062 tcg_constant_i64(16));
1101 gen_helper_probe_write_access(tcg_env, o->addr1, tcg_constant_i64(16));
1172 gen_helper_probe_write_access(tcg_env, o->addr1, tcg_constant_i64(16));
1215 tcg_constant_i64((v3 - v1 + 1) * 16));
1301 TCGv_i64 msb_mask = tcg_constant_i64(dup_const(es, 1ull << msb_bit_nr));
1352 TCGv_i64 zero = tcg_constant_i64(0);
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/openbmc/qemu/target/hppa/
H A Dtranslate.c361 .a1 = tcg_constant_i64(0) in cond_make_n()
373 return cond_make_tt(c, a0, tcg_constant_i64(imm)); in cond_make_ti()
758 tcg_gen_st_i64(tcg_constant_i64(ctx->insn), in gen_excp_iir()
880 tmp, tcg_constant_i64(sign_imm), in do_cond()
1122 tcg_constant_i64(-1), sv); in do_add_sv()
1183 *sv = tcg_constant_i64(0); in gen_tsv()
1286 tcg_im = tcg_constant_i64(a->i); in do_add_imm()
1318 TCGv_i64 one = tcg_constant_i64(1); in do_sub()
1375 tcg_im = tcg_constant_i64(a->i); in do_sub_imm()
1485 TCGv_i64 one = tcg_constant_i64(1); in do_unit_addsub()
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/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvzacas.c.inc38 return tcg_constant_i64(0);
H A Dtrans_rvzfh.c.inc302 mask = tcg_constant_i64(~MAKE_64BIT_MASK(15, 1));
H A Dtrans_rvf.c.inc308 mask = tcg_constant_i64(~MAKE_64BIT_MASK(31, 1));
/openbmc/qemu/accel/tcg/
H A Dplugin-gen.c196 TCGv_i64 val = tcg_constant_i64(cb->imm); in gen_inline_store_u64_cb()
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_bit.c.inc144 TCGv_i64 mask = tcg_constant_i64(0x0000ffff0000ffffull);
/openbmc/qemu/include/tcg/
H A Dtcg-op.h251 #define tcg_constant_tl tcg_constant_i64
/openbmc/qemu/target/sparc/
H A Dtranslate.c625 TCGv_i64 z = tcg_constant_i64(0); in gen_op_fpmaddxhi()
876 gen_helper_pdist(dst, tcg_constant_i64(0), src1, src2); in gen_op_pdistn()
1421 TCGv_i64 one = tcg_constant_i64(float64_one); in gen_op_fhaddd()
1436 TCGv_i64 one = tcg_constant_i64(float64_one); in gen_op_fhsubd()
1451 TCGv_i64 one = tcg_constant_i64(float64_one); in gen_op_fnhaddd()
1968 s64 = tcg_constant_i64(0xff); in gen_ldstub_asi()
3791 t2 = tcg_constant_i64((uint32_t)a->rs2_or_imm); in trans_UDIV()
3817 tcg_gen_umin_i64(t1, t1, tcg_constant_i64(UINT32_MAX)); in trans_UDIV()
4705 gen_store_fpr_D(dc, rd, tcg_constant_i64(c)); in do_dc()

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