/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | nand_timings.c | 60 .tWB_max = 200000, 105 .tWB_max = 100000, 149 .tWB_max = 100000, 195 .tWB_max = 100000, 240 .tWB_max = 100000, 285 .tWB_max = 100000, 332 .tWB_max = 100000, 374 .tWB_max = 100000, 416 .tWB_max = 100000, 458 .tWB_max = 100000, [all …]
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H A D | nand_base.c | 662 ndelay(NAND_COMMON_TIMING_NS(conf, tWB_max)); in nand_soft_waitrdy() 1145 NAND_OP_ADDR(3, addrs, NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_sp_exec_read_page_op() 1188 NAND_OP_CMD(NAND_CMD_READSTART, NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_lp_exec_read_page_op() 1242 NAND_OP_CMD(NAND_CMD_READSTART, NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_lp_exec_cont_read_page_op() 1244 NAND_OP_CMD(NAND_CMD_READCACHESEQ, NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_lp_exec_cont_read_page_op() 1252 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_lp_exec_cont_read_page_op() 1387 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_read_param_page_op() 1531 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_exec_prog_page_op() 1635 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_prog_page_end_op() 1953 NAND_COMMON_TIMING_NS(conf, tWB_max)), in nand_erase_op() [all …]
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H A D | stm32_fmc2_nand.c | 1287 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in stm32_fmc2_nfc_waitrdy() 1503 if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) && in stm32_fmc2_nfc_calc_timings() 1504 (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem)) in stm32_fmc2_nfc_calc_timings() 1505 thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem; in stm32_fmc2_nfc_calc_timings()
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H A D | sunxi_nand.c | 1464 if (timings->tWB_max > (min_clk_period * 20)) in sunxi_nfc_setup_interface() 1465 min_clk_period = DIV_ROUND_UP(timings->tWB_max, 20); in sunxi_nfc_setup_interface() 1490 tWB = sunxi_nand_lookup_timing(tWB_lut, timings->tWB_max, in sunxi_nfc_setup_interface()
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H A D | renesas-nand-controller.c | 919 TIM_SEQ1_TWB(TO_CYCLES64(sdr->tWB_max, period_ns)) | in rnandc_setup_interface() 926 bef_dly = sdr->tWB_max - sdr->tDH_min; in rnandc_setup_interface()
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H A D | tegra_nand.c | 805 reg |= TIMING_TWB(OFFSET(DIV_ROUND_UP(timings->tWB_max, period), 1)); in tegra_nand_setup_timing()
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H A D | marvell_nand.c | 2446 nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns); in marvell_nfc_setup_interface() 2448 nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max, in marvell_nfc_setup_interface()
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H A D | meson_nand.c | 1252 meson_chip->twb = DIV_ROUND_UP(PSEC_TO_NSEC(timings->tWB_max), in meson_nfc_setup_interface()
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H A D | cadence-nand-controller.c | 2537 twb_cnt = calc_cycl((sdr->tWB_max + board_delay), clk_period); in cadence_nand_setup_interface()
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/openbmc/u-boot/drivers/mtd/nand/raw/ |
H A D | nand_timings.c | 50 .tWB_max = 200000, 92 .tWB_max = 100000, 133 .tWB_max = 100000, 176 .tWB_max = 100000, 218 .tWB_max = 100000, 260 .tWB_max = 100000,
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H A D | sunxi_nand.c | 1290 tWB = sunxi_nand_lookup_timing(tWB_lut, timings->tWB_max, in sunxi_nand_chip_set_timings()
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/openbmc/linux/include/linux/mtd/ |
H A D | rawnand.h | 471 u32 tWB_max; member 559 u32 tWB_max; member
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/openbmc/u-boot/include/linux/mtd/ |
H A D | rawnand.h | 736 u32 tWB_max; member
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/openbmc/linux/drivers/mtd/nand/raw/atmel/ |
H A D | nand-controller.c | 1448 ncycles = DIV_ROUND_UP(conf->timings.sdr.tWB_max, mckperiodps); in atmel_smc_nand_prepare_smcconf()
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