Home
last modified time | relevance | path

Searched refs:t9 (Results 1 – 25 of 38) sorted by relevance

12

/openbmc/u-boot/arch/mips/cpu/
H A Dstart.S47 move k0, t9 # preserve t9 in k0
49 li t9, 15 # UHI exception operation
213 PTR_LA t9, mips_cm_map
214 jalr t9
224 PTR_LA t9, debug_uart_init
225 jalr t9
233 PTR_LA t9, lowlevel_init
234 jalr t9
239 PTR_LA t9, mips_cache_reset
240 jalr t9
[all …]
/openbmc/linux/arch/mips/boot/compressed/
H A Dhead.S35 PTR_LA t9, decompress_kernel
36 jalr t9
43 PTR_LI t9, KERNEL_ENTRY
44 jalr t9
/openbmc/linux/arch/mips/kernel/
H A Docteon_switch.S48 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
53 LONG_S t9, -LONGSIZE(t2)/* Store CVMSEG to thread storage */
65 LONG_L t9, TASK_STACK_CANARY(a1)
66 LONG_S t9, 0(t8)
99 dmfc0 t9, $9,7 /* CvmCtl register. */
108 bbit1 t9, 28, 1f
116 1: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */
262 dmfc0 t9, $9,7 /* CvmCtl register. */
273 bbit1 t9, 28, 2f /* Skip LLM if CvmCtl[NODFA_CP2] is set */
283 bbit1 t9, 26, done_restore /* done if CvmCtl[NOCRYPTO] set */
H A Dcps-vec.S171 move a1, t9
314 li t9, 0
323 mfc0 t9, CP0_GLOBALNUMBER
324 andi t9, t9, MIPS_GLOBALNUMBER_VP
343 mfc0 t9, $15, 1
344 and t9, t9, t1
349 mul v1, t9, t1
H A Dr2300_switch.S40 LONG_L t9, TASK_STACK_CANARY(a1)
41 LONG_S t9, 0(t8)
H A Dr4k_switch.S36 LONG_L t9, TASK_STACK_CANARY(a1)
37 LONG_S t9, 0(t8)
H A Dcps-vec-ns16550.S37 1: UART_L t0, UART_LSR_OFS(t9)
40 UART_S a0, UART_TX_OFS(t9)
176 li t9, CKSEG1ADDR(CONFIG_MIPS_CPS_NS16550_BASE)
/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dlowlevel_init.S194 lw t9, 0xc(s0)
195 srl t9, t9, 16
196 andi t9, t9, 0x1
197 bnez t9, MT7628_AN_DDR1_PAD
/openbmc/linux/arch/mips/include/asm/mach-loongson64/
H A Dkernel-entry-init.h93 2: li t9, 0x100 /* wait for init loop */
94 3: addiu t9, -1 /* limit mailbox access */
95 bnez t9, 3b
/openbmc/qemu/hw/smbios/
H A Dsmbios.c759 struct type9_instance *t9; in smbios_build_type_9_table() local
761 QTAILQ_FOREACH(t9, &type9, next) { in smbios_build_type_9_table()
764 SMBIOS_TABLE_SET_STR(9, slot_designation, t9->slot_designation); in smbios_build_type_9_table()
765 t->slot_type = t9->slot_type; in smbios_build_type_9_table()
766 t->slot_data_bus_width = t9->slot_data_bus_width; in smbios_build_type_9_table()
767 t->current_usage = t9->current_usage; in smbios_build_type_9_table()
768 t->slot_length = t9->slot_length; in smbios_build_type_9_table()
769 t->slot_id = t9->slot_id; in smbios_build_type_9_table()
770 t->slot_characteristics1 = t9->slot_characteristics1; in smbios_build_type_9_table()
771 t->slot_characteristics2 = t9->slot_characteristics2; in smbios_build_type_9_table()
[all …]
/openbmc/u-boot/arch/mips/include/asm/
H A Dregdef.h48 #define t9 $25 macro
91 #define t9 $25 /* callee address for PIC/temp */ macro
/openbmc/linux/arch/mips/include/asm/
H A Dregdef.h51 #define t9 $25 macro
94 #define t9 $25 /* callee address for PIC/temp */ macro
/openbmc/u-boot/arch/mips/lib/
H A Dgenex.S188 PTR_LA t9, do_reserved
189 jr t9
209 PTR_LA t9, do_ejtag_debug
210 jalr t9
/openbmc/u-boot/examples/api/
H A Dcrt0.S56 PTR_L $t9, syscall_ptr
57 jalr $t9
/openbmc/linux/arch/alpha/lib/
H A Dstxcpy.S39 .frame sp, 0, t9
91 ret (t9) # .. e1 :
99 .frame sp, 0, t9
230 ret (t9) # .. e1 :
288 ret (t9) # e1 :
H A Dev6-stxcpy.S50 .frame sp, 0, t9
109 ret (t9) # L0 : Latency=3
119 .frame sp, 0, t9
259 ret (t9) # L0 : Latency=3
318 ret (t9) # e1 :
H A Dstxncpy.S47 .frame sp, 0, t9, 0
105 ret (t9) # e1 :
118 .frame sp, 0, t9, 0
266 ret (t9) # .. e1 :
344 ret (t9) # .. e1 :
H A Dev6-stxncpy.S58 .frame sp, 0, t9, 0
133 ret (t9) # L0 : Latency=3
150 .frame sp, 0, t9, 0
312 ret (t9) # L0 : Latency=3
393 ret (t9) # L0 : Latency=3
/openbmc/linux/arch/ia64/lib/
H A Dcopy_page_mck.S84 #define t9 t5 // alias! macro
163 (p[D]) ld8 t9 = [src0], 3*8
170 (p[D]) st8 [dst0] = t9, 3*8
/openbmc/qemu/common-user/host/mips/
H A Dsafe-syscall.inc.S145 PTR_LA t9, safe_syscall_set_errno_tail
146 jr t9
/openbmc/linux/tools/perf/util/hisi-ptt-decoder/
H A Dhisi-ptt-pkt-decoder.c80 uint32_t t9 : 1; member
138 "Format", dw0.format, "Type", dw0.type, "T9", dw0.t9, in hisi_ptt_4dw_print_dw0()
/openbmc/linux/arch/alpha/include/uapi/asm/
H A Dregdef.h33 #define t9 $23 macro
/openbmc/linux/arch/arm64/crypto/
H A Dghash-ce-core.S31 t9 .req v16
106 pmull\t t9.8h, \ad, \b4\().\nb // K = A*B4
115 uzp1 t6.2d, t7.2d, t9.2d
116 uzp2 t7.2d, t7.2d, t9.2d
133 zip2 t9.2d, t6.2d, t7.2d
139 ext t9.16b, t9.16b, t9.16b, #12
142 eor t7.16b, t7.16b, t9.16b
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_pps.c1288 seq->t9 = REG_FIELD_GET(PANEL_LIGHT_OFF_DELAY_MASK, pp_off); in intel_pps_readout_hw_state()
1310 seq->t1_t3, seq->t8, seq->t9, seq->t10, seq->t11_t12); in intel_pps_dump_state()
1322 if (hw.t1_t3 != sw->t1_t3 || hw.t8 != sw->t8 || hw.t9 != sw->t9 || in intel_pps_verify_state()
1332 return delays->t1_t3 || delays->t8 || delays->t9 || in pps_delays_valid()
1394 spec->t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */ in pps_init_delays_spec()
1428 assign_final(t9); in pps_init_delays()
1436 intel_dp->pps.backlight_off_delay = get_delay(t9); in pps_init_delays()
1459 final->t9 = 1; in pps_init_delays()
1510 pp_off = REG_FIELD_PREP(PANEL_LIGHT_OFF_DELAY_MASK, seq->t9) | in pps_init_registers()
/openbmc/u-boot/arch/m68k/include/asm/coldfire/
H A Data.h23 u8 t9; /* 0x08 */ member

12