xref: /openbmc/linux/arch/mips/include/asm/regdef.h (revision 70342287)
1384740dcSRalf Baechle /*
2384740dcSRalf Baechle  * This file is subject to the terms and conditions of the GNU General Public
3384740dcSRalf Baechle  * License.  See the file "COPYING" in the main directory of this archive
4384740dcSRalf Baechle  * for more details.
5384740dcSRalf Baechle  *
6384740dcSRalf Baechle  * Copyright (C) 1985 MIPS Computer Systems, Inc.
7384740dcSRalf Baechle  * Copyright (C) 1994, 95, 99, 2003 by Ralf Baechle
8384740dcSRalf Baechle  * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
93ba1e543SRalf Baechle  * Copyright (C) 2011 Wind River Systems,
103ba1e543SRalf Baechle  *   written by Ralf Baechle <ralf@linux-mips.org>
11384740dcSRalf Baechle  */
12384740dcSRalf Baechle #ifndef _ASM_REGDEF_H
13384740dcSRalf Baechle #define _ASM_REGDEF_H
14384740dcSRalf Baechle 
15384740dcSRalf Baechle #include <asm/sgidefs.h>
16384740dcSRalf Baechle 
17384740dcSRalf Baechle #if _MIPS_SIM == _MIPS_SIM_ABI32
18384740dcSRalf Baechle 
19384740dcSRalf Baechle /*
20384740dcSRalf Baechle  * Symbolic register names for 32 bit ABI
21384740dcSRalf Baechle  */
22384740dcSRalf Baechle #define zero	$0	/* wired zero */
23384740dcSRalf Baechle #define AT	$1	/* assembler temp  - uppercase because of ".set at" */
24384740dcSRalf Baechle #define v0	$2	/* return value */
25384740dcSRalf Baechle #define v1	$3
26384740dcSRalf Baechle #define a0	$4	/* argument registers */
27384740dcSRalf Baechle #define a1	$5
28384740dcSRalf Baechle #define a2	$6
29384740dcSRalf Baechle #define a3	$7
30384740dcSRalf Baechle #define t0	$8	/* caller saved */
31384740dcSRalf Baechle #define t1	$9
32384740dcSRalf Baechle #define t2	$10
33384740dcSRalf Baechle #define t3	$11
34384740dcSRalf Baechle #define t4	$12
353ba1e543SRalf Baechle #define ta0	$12
36384740dcSRalf Baechle #define t5	$13
373ba1e543SRalf Baechle #define ta1	$13
38384740dcSRalf Baechle #define t6	$14
393ba1e543SRalf Baechle #define ta2	$14
40384740dcSRalf Baechle #define t7	$15
413ba1e543SRalf Baechle #define ta3	$15
42384740dcSRalf Baechle #define s0	$16	/* callee saved */
43384740dcSRalf Baechle #define s1	$17
44384740dcSRalf Baechle #define s2	$18
45384740dcSRalf Baechle #define s3	$19
46384740dcSRalf Baechle #define s4	$20
47384740dcSRalf Baechle #define s5	$21
48384740dcSRalf Baechle #define s6	$22
49384740dcSRalf Baechle #define s7	$23
50384740dcSRalf Baechle #define t8	$24	/* caller saved */
51384740dcSRalf Baechle #define t9	$25
52384740dcSRalf Baechle #define jp	$25	/* PIC jump register */
53384740dcSRalf Baechle #define k0	$26	/* kernel scratch */
54384740dcSRalf Baechle #define k1	$27
55384740dcSRalf Baechle #define gp	$28	/* global pointer */
56384740dcSRalf Baechle #define sp	$29	/* stack pointer */
57384740dcSRalf Baechle #define fp	$30	/* frame pointer */
58384740dcSRalf Baechle #define s8	$30	/* same like fp! */
59384740dcSRalf Baechle #define ra	$31	/* return address */
60384740dcSRalf Baechle 
61384740dcSRalf Baechle #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
62384740dcSRalf Baechle 
63384740dcSRalf Baechle #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
64384740dcSRalf Baechle 
65384740dcSRalf Baechle #define zero	$0	/* wired zero */
66384740dcSRalf Baechle #define AT	$at	/* assembler temp - uppercase because of ".set at" */
67384740dcSRalf Baechle #define v0	$2	/* return value - caller saved */
68384740dcSRalf Baechle #define v1	$3
69384740dcSRalf Baechle #define a0	$4	/* argument registers */
70384740dcSRalf Baechle #define a1	$5
71384740dcSRalf Baechle #define a2	$6
72384740dcSRalf Baechle #define a3	$7
73384740dcSRalf Baechle #define a4	$8	/* arg reg 64 bit; caller saved in 32 bit */
74384740dcSRalf Baechle #define ta0	$8
75384740dcSRalf Baechle #define a5	$9
76384740dcSRalf Baechle #define ta1	$9
77384740dcSRalf Baechle #define a6	$10
78384740dcSRalf Baechle #define ta2	$10
79384740dcSRalf Baechle #define a7	$11
80384740dcSRalf Baechle #define ta3	$11
81384740dcSRalf Baechle #define t0	$12	/* caller saved */
82384740dcSRalf Baechle #define t1	$13
83384740dcSRalf Baechle #define t2	$14
84384740dcSRalf Baechle #define t3	$15
85384740dcSRalf Baechle #define s0	$16	/* callee saved */
86384740dcSRalf Baechle #define s1	$17
87384740dcSRalf Baechle #define s2	$18
88384740dcSRalf Baechle #define s3	$19
89384740dcSRalf Baechle #define s4	$20
90384740dcSRalf Baechle #define s5	$21
91384740dcSRalf Baechle #define s6	$22
92384740dcSRalf Baechle #define s7	$23
93384740dcSRalf Baechle #define t8	$24	/* caller saved */
94384740dcSRalf Baechle #define t9	$25	/* callee address for PIC/temp */
95384740dcSRalf Baechle #define jp	$25	/* PIC jump register */
96384740dcSRalf Baechle #define k0	$26	/* kernel temporary */
97384740dcSRalf Baechle #define k1	$27
98384740dcSRalf Baechle #define gp	$28	/* global pointer - caller saved for PIC */
99384740dcSRalf Baechle #define sp	$29	/* stack pointer */
100384740dcSRalf Baechle #define fp	$30	/* frame pointer */
101384740dcSRalf Baechle #define s8	$30	/* callee saved */
102384740dcSRalf Baechle #define ra	$31	/* return address */
103384740dcSRalf Baechle 
104384740dcSRalf Baechle #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
105384740dcSRalf Baechle 
106384740dcSRalf Baechle #endif /* _ASM_REGDEF_H */
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