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Searched refs:srds_cfg (Results 1 – 16 of 16) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dp1010_serdes.c55 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
63 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
65 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
66 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
70 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
77 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
78 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
83 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dp1021_serdes.c55 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
63 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
65 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
66 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
71 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
85 if ((serdes1_cfg_tbl[srds_cfg][1] == PCIE1) || in fsl_serdes_init()
86 (serdes1_cfg_tbl[srds_cfg][1] == PCIE2)) { in fsl_serdes_init()
95 if (srds_cfg == 0x6) { in fsl_serdes_init()
H A Dmpc8544_serdes.c56 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
64 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
66 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
67 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
71 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
78 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
79 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
84 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dp1022_serdes.c94 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
102 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
104 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
105 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
109 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
116 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
117 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
122 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dp1023_serdes.c39 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
46 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
48 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
49 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
53 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dc29x_serdes.c44 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
52 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
54 if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
55 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
59 ptr = &serdes1_cfg_tbl[srds_cfg]; in fsl_serdes_init()
H A Dmpc8568_serdes.c36 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
43 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
45 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
46 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
51 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dp2020_serdes.c44 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
51 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
53 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
54 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
59 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8569_serdes.c45 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
52 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
54 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
55 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
60 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8572_serdes.c40 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
47 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
49 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
50 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
55 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dbsc9132_serdes.c80 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
87 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
89 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
90 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
95 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dmpc8610_serdes.c52 u32 srds_cfg = (pordevsr & MPC8610_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
60 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
62 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
63 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
67 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
74 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
75 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
80 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
H A Dmpc8641_serdes.c61 u32 srds_cfg = (pordevsr & MPC8641_PORDEVSR_IO_SEL) >> in fsl_serdes_init() local
69 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); in fsl_serdes_init()
71 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) { in fsl_serdes_init()
72 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
76 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
83 if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { in fsl_serdes_init()
84 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); in fsl_serdes_init()
89 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
/openbmc/u-boot/board/freescale/p1022ds/
H A Dp1022ds.c228 unsigned int srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in board_serdes_name() local
230 enum slot_id slot = serdes_dev_slot[srds_cfg][device]; in board_serdes_name()
/openbmc/u-boot/board/gdsys/p1022/
H A Dcontrolcenterd.c202 unsigned int srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in board_serdes_name() local
204 enum slot_id slot = serdes_dev_slot[srds_cfg][device]; in board_serdes_name()
/openbmc/u-boot/board/freescale/bsc9132qds/
H A Dbsc9132qds.c49 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> in board_config_serdes_mux() local
52 switch (srds_cfg) { in board_config_serdes_mux()