1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2010 Freescale Semiconductor, Inc.
4 */
5
6 #include <config.h>
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/immap_85xx.h>
10 #include <asm/fsl_serdes.h>
11
12 #define SRDS1_MAX_LANES 8
13
14 static u32 serdes1_prtcl_map;
15
16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
17 [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
18 [0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
19 [0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
20 [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
21 [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
22 };
23
is_serdes_configured(enum srds_prtcl prtcl)24 int is_serdes_configured(enum srds_prtcl prtcl)
25 {
26 if (!(serdes1_prtcl_map & (1 << NONE)))
27 fsl_serdes_init();
28
29 return (1 << prtcl) & serdes1_prtcl_map;
30 }
31
fsl_serdes_init(void)32 void fsl_serdes_init(void)
33 {
34 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
35 u32 pordevsr = in_be32(&gur->pordevsr);
36 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
37 MPC85xx_PORDEVSR_IO_SEL_SHIFT;
38 int lane;
39
40 if (serdes1_prtcl_map & (1 << NONE))
41 return;
42
43 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
44
45 if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
46 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
47 return;
48 }
49
50 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
51 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
52 serdes1_prtcl_map |= (1 << lane_prtcl);
53 }
54
55 /* Set the first bit to indicate serdes has been initialized */
56 serdes1_prtcl_map |= (1 << NONE);
57 }
58