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Searched refs:sprn (Results 1 – 17 of 17) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dspr_common.h81 void spr_noaccess(DisasContext *ctx, int gprn, int sprn);
82 void spr_read_generic(DisasContext *ctx, int gprn, int sprn);
83 void spr_write_generic(DisasContext *ctx, int sprn, int gprn);
84 void spr_write_generic32(DisasContext *ctx, int sprn, int gprn);
85 void spr_core_write_generic(DisasContext *ctx, int sprn, int gprn);
86 void spr_core_write_generic32(DisasContext *ctx, int sprn, int gprn);
87 void spr_core_lpar_write_generic(DisasContext *ctx, int sprn, int gprn);
88 void spr_write_MMCR0(DisasContext *ctx, int sprn, int gprn);
89 void spr_write_MMCR1(DisasContext *ctx, int sprn, int gprn);
90 void spr_write_MMCRA(DisasContext *ctx, int sprn, int gprn);
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H A Dpower8-pmu.c25 static bool pmc_has_overflow_enabled(CPUPPCState *env, int sprn) in pmc_has_overflow_enabled() argument
27 if (sprn == SPR_POWER_PMC1) { in pmc_has_overflow_enabled()
205 int sprn, cyc_cnt = env->pmc_cyc_cnt; in pmu_update_cycles() local
207 for (sprn = SPR_POWER_PMC1; sprn <= SPR_POWER_PMC6; sprn++) { in pmu_update_cycles()
208 if (cyc_cnt & (1 << (sprn - SPR_POWER_PMC1 + 1))) { in pmu_update_cycles()
213 env->spr[sprn] += time_delta; in pmu_update_cycles()
225 static QEMUTimer *get_cyc_overflow_timer(CPUPPCState *env, int sprn) in get_cyc_overflow_timer() argument
227 return env->pmu_cyc_overflow_timers[sprn - SPR_POWER_PMC1]; in get_cyc_overflow_timer()
230 static void pmc_update_overflow_timer(CPUPPCState *env, int sprn) in pmc_update_overflow_timer() argument
232 QEMUTimer *pmc_overflow_timer = get_cyc_overflow_timer(env, sprn); in pmc_update_overflow_timer()
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H A Dpower8-pmu-regs.c.inc62 static TCGv masked_gprn_for_spr_write(int gprn, int sprn,
69 gen_load_spr(ret, sprn);
81 void spr_read_MMCR0_ureg(DisasContext *ctx, int gprn, int sprn)
118 void spr_write_MMCR0_ureg(DisasContext *ctx, int sprn, int gprn)
136 void spr_read_MMCR2_ureg(DisasContext *ctx, int gprn, int sprn)
161 void spr_write_MMCR2_ureg(DisasContext *ctx, int sprn, int gprn)
178 void spr_write_MMCRA(DisasContext *ctx, int sprn, int gprn)
183 void spr_read_PMC(DisasContext *ctx, int gprn, int sprn)
185 TCGv_i32 t_sprn = tcg_constant_i32(sprn);
191 void spr_read_PMC14_ureg(DisasContext *ctx, int gprn, int sprn)
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H A Dmisc_helper.c34 void helper_load_dump_spr(CPUPPCState *env, uint32_t sprn) in helper_load_dump_spr() argument
36 qemu_log("Read SPR %d %03x => " TARGET_FMT_lx "\n", sprn, sprn, in helper_load_dump_spr()
37 env->spr[sprn]); in helper_load_dump_spr()
40 void helper_store_dump_spr(CPUPPCState *env, uint32_t sprn) in helper_store_dump_spr() argument
42 qemu_log("Write SPR %d %03x <= " TARGET_FMT_lx "\n", sprn, sprn, in helper_store_dump_spr()
43 env->spr[sprn]); in helper_store_dump_spr()
46 void helper_spr_core_write_generic(CPUPPCState *env, uint32_t sprn, in helper_spr_core_write_generic() argument
53 env->spr[sprn] = val; in helper_spr_core_write_generic()
59 cenv->spr[sprn] = val; in helper_spr_core_write_generic()
63 void helper_spr_write_CTRL(CPUPPCState *env, uint32_t sprn, in helper_spr_write_CTRL() argument
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H A Dtranslate.c407 void spr_noaccess(DisasContext *ctx, int gprn, int sprn) in spr_noaccess() argument
410 sprn = ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5); in spr_noaccess()
411 printf("ERROR: try to access SPR %d !\n", sprn); in spr_noaccess()
421 static void spr_load_dump_spr(int sprn) in spr_load_dump_spr() argument
424 TCGv_i32 t0 = tcg_constant_i32(sprn); in spr_load_dump_spr()
429 void spr_read_generic(DisasContext *ctx, int gprn, int sprn) in spr_read_generic() argument
431 gen_load_spr(cpu_gpr[gprn], sprn); in spr_read_generic()
432 spr_load_dump_spr(sprn); in spr_read_generic()
435 static void spr_store_dump_spr(int sprn) in spr_store_dump_spr() argument
438 TCGv_i32 t0 = tcg_constant_i32(sprn); in spr_store_dump_spr()
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H A Dinternal.h130 uint32_t sprn = _SPR(opcode); in SPR() local
132 return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5); in SPR()
/openbmc/linux/arch/powerpc/kvm/
H A Demulate.c75 static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) in kvmppc_emulate_mtspr() argument
80 switch (sprn) { in kvmppc_emulate_mtspr()
115 emulated = vcpu->kvm->arch.kvm_ops->emulate_mtspr(vcpu, sprn, in kvmppc_emulate_mtspr()
119 "0x%x\n", sprn); in kvmppc_emulate_mtspr()
128 static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) in kvmppc_emulate_mfspr() argument
133 switch (sprn) { in kvmppc_emulate_mfspr()
176 emulated = vcpu->kvm->arch.kvm_ops->emulate_mfspr(vcpu, sprn, in kvmppc_emulate_mfspr()
180 "0x%x\n", sprn); in kvmppc_emulate_mfspr()
198 int rs, rt, sprn; in kvmppc_emulate_instruction() local
214 sprn = get_sprn(inst); in kvmppc_emulate_instruction()
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H A Dbook3s_emulate.c653 static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn) in kvmppc_find_bat() argument
658 switch (sprn) { in kvmppc_find_bat()
660 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2]; in kvmppc_find_bat()
663 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)]; in kvmppc_find_bat()
666 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2]; in kvmppc_find_bat()
669 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)]; in kvmppc_find_bat()
678 int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) in kvmppc_core_emulate_mtspr_pr() argument
682 switch (sprn) { in kvmppc_core_emulate_mtspr_pr()
702 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn); in kvmppc_core_emulate_mtspr_pr()
704 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val); in kvmppc_core_emulate_mtspr_pr()
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H A Dbooke.h75 int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val);
76 int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val);
99 extern int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn,
101 extern int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn,
103 extern int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn,
105 extern int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn,
H A De500_emulate.c204 int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) in kvmppc_core_emulate_mtspr_e500() argument
209 switch (sprn) { in kvmppc_core_emulate_mtspr_e500()
315 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val); in kvmppc_core_emulate_mtspr_e500()
321 int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) in kvmppc_core_emulate_mfspr_e500() argument
326 switch (sprn) { in kvmppc_core_emulate_mfspr_e500()
447 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val); in kvmppc_core_emulate_mfspr_e500()
H A Dbook3s.h22 int sprn, ulong spr_val);
24 int sprn, ulong *spr_val);
H A Dbooke_emulate.c120 int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) in kvmppc_booke_emulate_mtspr() argument
125 switch (sprn) { in kvmppc_booke_emulate_mtspr()
379 int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) in kvmppc_booke_emulate_mfspr() argument
383 switch (sprn) { in kvmppc_booke_emulate_mfspr()
H A Dbook3s_hv.c5607 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, in kvmppc_core_emulate_mtspr_hv() argument
5613 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, in kvmppc_core_emulate_mfspr_hv() argument
/openbmc/linux/arch/powerpc/kernel/
H A Dkvm.c47 #define KVM_INST_SPR(sprn, moveto) (0x7c0002a6 | \ argument
48 (((sprn) & 0x1f) << 16) | \
49 (((sprn) & 0x3e0) << 6) | \
52 #define KVM_INST_MFSPR(sprn) KVM_INST_SPR(sprn, SPR_FROM) argument
53 #define KVM_INST_MTSPR(sprn) KVM_INST_SPR(sprn, SPR_TO) argument
/openbmc/linux/drivers/cpufreq/
H A Dpowernv-cpufreq.c437 static inline unsigned long get_pmspr(unsigned long sprn) in get_pmspr() argument
439 switch (sprn) { in get_pmspr()
452 static inline void set_pmspr(unsigned long sprn, unsigned long val) in set_pmspr() argument
454 switch (sprn) { in set_pmspr()
/openbmc/linux/arch/powerpc/include/asm/
H A Dkvm_ppc.h297 int (*emulate_mtspr)(struct kvm_vcpu *vcpu, int sprn, ulong spr_val);
298 int (*emulate_mfspr)(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val);
H A Dopal.h200 int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);