1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2bc8080cbSHollis Blanchard /*
35ce941eeSScott Wood * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
4bc8080cbSHollis Blanchard *
5bc8080cbSHollis Blanchard * Author: Yu Liu, <yu.liu@freescale.com>
6bc8080cbSHollis Blanchard *
7bc8080cbSHollis Blanchard * Description:
8bc8080cbSHollis Blanchard * This file is derived from arch/powerpc/kvm/44x_emulate.c,
9bc8080cbSHollis Blanchard * by Hollis Blanchard <hollisb@us.ibm.com>.
10bc8080cbSHollis Blanchard */
11bc8080cbSHollis Blanchard
12bc8080cbSHollis Blanchard #include <asm/kvm_ppc.h>
13bc8080cbSHollis Blanchard #include <asm/disassemble.h>
144ab96919SAlexander Graf #include <asm/dbell.h>
152daab50eSTudor Laurentiu #include <asm/reg_booke.h>
16bc8080cbSHollis Blanchard
17bc8080cbSHollis Blanchard #include "booke.h"
1829a5a6f9SScott Wood #include "e500.h"
19bc8080cbSHollis Blanchard
208f20a3abSAlexander Graf #define XOP_DCBTLS 166
214ab96919SAlexander Graf #define XOP_MSGSND 206
224ab96919SAlexander Graf #define XOP_MSGCLR 238
232daab50eSTudor Laurentiu #define XOP_MFTMR 366
24bc8080cbSHollis Blanchard #define XOP_TLBIVAX 786
25bc8080cbSHollis Blanchard #define XOP_TLBSX 914
26bc8080cbSHollis Blanchard #define XOP_TLBRE 946
27bc8080cbSHollis Blanchard #define XOP_TLBWE 978
28ab9fc405SScott Wood #define XOP_TLBILX 18
29b12c7841SBharat Bhushan #define XOP_EHPRIV 270
30bc8080cbSHollis Blanchard
314ab96919SAlexander Graf #ifdef CONFIG_KVM_E500MC
dbell2prio(ulong param)324ab96919SAlexander Graf static int dbell2prio(ulong param)
334ab96919SAlexander Graf {
344ab96919SAlexander Graf int msg = param & PPC_DBELL_TYPE_MASK;
354ab96919SAlexander Graf int prio = -1;
364ab96919SAlexander Graf
374ab96919SAlexander Graf switch (msg) {
384ab96919SAlexander Graf case PPC_DBELL_TYPE(PPC_DBELL):
394ab96919SAlexander Graf prio = BOOKE_IRQPRIO_DBELL;
404ab96919SAlexander Graf break;
414ab96919SAlexander Graf case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
424ab96919SAlexander Graf prio = BOOKE_IRQPRIO_DBELL_CRIT;
434ab96919SAlexander Graf break;
444ab96919SAlexander Graf default:
454ab96919SAlexander Graf break;
464ab96919SAlexander Graf }
474ab96919SAlexander Graf
484ab96919SAlexander Graf return prio;
494ab96919SAlexander Graf }
504ab96919SAlexander Graf
kvmppc_e500_emul_msgclr(struct kvm_vcpu * vcpu,int rb)514ab96919SAlexander Graf static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
524ab96919SAlexander Graf {
531143a706SSimon Guo ulong param = vcpu->arch.regs.gpr[rb];
544ab96919SAlexander Graf int prio = dbell2prio(param);
554ab96919SAlexander Graf
564ab96919SAlexander Graf if (prio < 0)
574ab96919SAlexander Graf return EMULATE_FAIL;
584ab96919SAlexander Graf
594ab96919SAlexander Graf clear_bit(prio, &vcpu->arch.pending_exceptions);
604ab96919SAlexander Graf return EMULATE_DONE;
614ab96919SAlexander Graf }
624ab96919SAlexander Graf
kvmppc_e500_emul_msgsnd(struct kvm_vcpu * vcpu,int rb)634ab96919SAlexander Graf static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
644ab96919SAlexander Graf {
651143a706SSimon Guo ulong param = vcpu->arch.regs.gpr[rb];
664ab96919SAlexander Graf int prio = dbell2prio(rb);
674ab96919SAlexander Graf int pir = param & PPC_DBELL_PIR_MASK;
68*46808a4cSMarc Zyngier unsigned long i;
694ab96919SAlexander Graf struct kvm_vcpu *cvcpu;
704ab96919SAlexander Graf
714ab96919SAlexander Graf if (prio < 0)
724ab96919SAlexander Graf return EMULATE_FAIL;
734ab96919SAlexander Graf
744ab96919SAlexander Graf kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
754ab96919SAlexander Graf int cpir = cvcpu->arch.shared->pir;
764ab96919SAlexander Graf if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
774ab96919SAlexander Graf set_bit(prio, &cvcpu->arch.pending_exceptions);
784ab96919SAlexander Graf kvm_vcpu_kick(cvcpu);
794ab96919SAlexander Graf }
804ab96919SAlexander Graf }
814ab96919SAlexander Graf
824ab96919SAlexander Graf return EMULATE_DONE;
834ab96919SAlexander Graf }
844ab96919SAlexander Graf #endif
854ab96919SAlexander Graf
kvmppc_e500_emul_ehpriv(struct kvm_vcpu * vcpu,unsigned int inst,int * advance)868c99d345STianjia Zhang static int kvmppc_e500_emul_ehpriv(struct kvm_vcpu *vcpu,
87b12c7841SBharat Bhushan unsigned int inst, int *advance)
88b12c7841SBharat Bhushan {
89b12c7841SBharat Bhushan int emulated = EMULATE_DONE;
90b12c7841SBharat Bhushan
91b12c7841SBharat Bhushan switch (get_oc(inst)) {
92b12c7841SBharat Bhushan case EHPRIV_OC_DEBUG:
938c99d345STianjia Zhang vcpu->run->exit_reason = KVM_EXIT_DEBUG;
948c99d345STianjia Zhang vcpu->run->debug.arch.address = vcpu->arch.regs.nip;
958c99d345STianjia Zhang vcpu->run->debug.arch.status = 0;
96b12c7841SBharat Bhushan kvmppc_account_exit(vcpu, DEBUG_EXITS);
97b12c7841SBharat Bhushan emulated = EMULATE_EXIT_USER;
98b12c7841SBharat Bhushan *advance = 0;
99b12c7841SBharat Bhushan break;
100b12c7841SBharat Bhushan default:
101b12c7841SBharat Bhushan emulated = EMULATE_FAIL;
102b12c7841SBharat Bhushan }
103b12c7841SBharat Bhushan return emulated;
104b12c7841SBharat Bhushan }
105b12c7841SBharat Bhushan
kvmppc_e500_emul_dcbtls(struct kvm_vcpu * vcpu)1068f20a3abSAlexander Graf static int kvmppc_e500_emul_dcbtls(struct kvm_vcpu *vcpu)
1078f20a3abSAlexander Graf {
1088f20a3abSAlexander Graf struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1098f20a3abSAlexander Graf
1108f20a3abSAlexander Graf /* Always fail to lock the cache */
1118f20a3abSAlexander Graf vcpu_e500->l1csr0 |= L1CSR0_CUL;
1128f20a3abSAlexander Graf return EMULATE_DONE;
1138f20a3abSAlexander Graf }
1148f20a3abSAlexander Graf
kvmppc_e500_emul_mftmr(struct kvm_vcpu * vcpu,unsigned int inst,int rt)1152daab50eSTudor Laurentiu static int kvmppc_e500_emul_mftmr(struct kvm_vcpu *vcpu, unsigned int inst,
1162daab50eSTudor Laurentiu int rt)
1172daab50eSTudor Laurentiu {
1182daab50eSTudor Laurentiu /* Expose one thread per vcpu */
1192daab50eSTudor Laurentiu if (get_tmrn(inst) == TMRN_TMCFG0) {
1202daab50eSTudor Laurentiu kvmppc_set_gpr(vcpu, rt,
1212daab50eSTudor Laurentiu 1 | (1 << TMRN_TMCFG0_NATHRD_SHIFT));
1222daab50eSTudor Laurentiu return EMULATE_DONE;
1232daab50eSTudor Laurentiu }
1242daab50eSTudor Laurentiu
1252daab50eSTudor Laurentiu return EMULATE_FAIL;
1262daab50eSTudor Laurentiu }
1272daab50eSTudor Laurentiu
kvmppc_core_emulate_op_e500(struct kvm_vcpu * vcpu,unsigned int inst,int * advance)1288c99d345STianjia Zhang int kvmppc_core_emulate_op_e500(struct kvm_vcpu *vcpu,
129bc8080cbSHollis Blanchard unsigned int inst, int *advance)
130bc8080cbSHollis Blanchard {
131bc8080cbSHollis Blanchard int emulated = EMULATE_DONE;
132c46dc9a8SAlexander Graf int ra = get_ra(inst);
133c46dc9a8SAlexander Graf int rb = get_rb(inst);
134c46dc9a8SAlexander Graf int rt = get_rt(inst);
1357cdd7a95SMihai Caraman gva_t ea;
136bc8080cbSHollis Blanchard
137bc8080cbSHollis Blanchard switch (get_op(inst)) {
138bc8080cbSHollis Blanchard case 31:
139bc8080cbSHollis Blanchard switch (get_xop(inst)) {
140bc8080cbSHollis Blanchard
1418f20a3abSAlexander Graf case XOP_DCBTLS:
1428f20a3abSAlexander Graf emulated = kvmppc_e500_emul_dcbtls(vcpu);
1438f20a3abSAlexander Graf break;
1448f20a3abSAlexander Graf
1454ab96919SAlexander Graf #ifdef CONFIG_KVM_E500MC
1464ab96919SAlexander Graf case XOP_MSGSND:
147c46dc9a8SAlexander Graf emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
1484ab96919SAlexander Graf break;
1494ab96919SAlexander Graf
1504ab96919SAlexander Graf case XOP_MSGCLR:
151c46dc9a8SAlexander Graf emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
1524ab96919SAlexander Graf break;
1534ab96919SAlexander Graf #endif
1544ab96919SAlexander Graf
155bc8080cbSHollis Blanchard case XOP_TLBRE:
156bc8080cbSHollis Blanchard emulated = kvmppc_e500_emul_tlbre(vcpu);
157bc8080cbSHollis Blanchard break;
158bc8080cbSHollis Blanchard
159bc8080cbSHollis Blanchard case XOP_TLBWE:
160bc8080cbSHollis Blanchard emulated = kvmppc_e500_emul_tlbwe(vcpu);
161bc8080cbSHollis Blanchard break;
162bc8080cbSHollis Blanchard
163bc8080cbSHollis Blanchard case XOP_TLBSX:
1647cdd7a95SMihai Caraman ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
1657cdd7a95SMihai Caraman emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
166bc8080cbSHollis Blanchard break;
167bc8080cbSHollis Blanchard
1687cdd7a95SMihai Caraman case XOP_TLBILX: {
1697cdd7a95SMihai Caraman int type = rt & 0x3;
1707cdd7a95SMihai Caraman ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
1717cdd7a95SMihai Caraman emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
172ab9fc405SScott Wood break;
1737cdd7a95SMihai Caraman }
174ab9fc405SScott Wood
175bc8080cbSHollis Blanchard case XOP_TLBIVAX:
1767cdd7a95SMihai Caraman ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
1777cdd7a95SMihai Caraman emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
178bc8080cbSHollis Blanchard break;
179bc8080cbSHollis Blanchard
1802daab50eSTudor Laurentiu case XOP_MFTMR:
1812daab50eSTudor Laurentiu emulated = kvmppc_e500_emul_mftmr(vcpu, inst, rt);
1822daab50eSTudor Laurentiu break;
1832daab50eSTudor Laurentiu
184b12c7841SBharat Bhushan case XOP_EHPRIV:
1858c99d345STianjia Zhang emulated = kvmppc_e500_emul_ehpriv(vcpu, inst, advance);
186b12c7841SBharat Bhushan break;
187b12c7841SBharat Bhushan
188bc8080cbSHollis Blanchard default:
189bc8080cbSHollis Blanchard emulated = EMULATE_FAIL;
190bc8080cbSHollis Blanchard }
191bc8080cbSHollis Blanchard
192bc8080cbSHollis Blanchard break;
193bc8080cbSHollis Blanchard
194bc8080cbSHollis Blanchard default:
195bc8080cbSHollis Blanchard emulated = EMULATE_FAIL;
196bc8080cbSHollis Blanchard }
197bc8080cbSHollis Blanchard
198bc8080cbSHollis Blanchard if (emulated == EMULATE_FAIL)
1998c99d345STianjia Zhang emulated = kvmppc_booke_emulate_op(vcpu, inst, advance);
200bc8080cbSHollis Blanchard
201bc8080cbSHollis Blanchard return emulated;
202bc8080cbSHollis Blanchard }
203bc8080cbSHollis Blanchard
kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu * vcpu,int sprn,ulong spr_val)2043a167beaSAneesh Kumar K.V int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
205bc8080cbSHollis Blanchard {
206bc8080cbSHollis Blanchard struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
207bc8080cbSHollis Blanchard int emulated = EMULATE_DONE;
208bc8080cbSHollis Blanchard
209bc8080cbSHollis Blanchard switch (sprn) {
21073196cd3SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
211bc8080cbSHollis Blanchard case SPRN_PID:
2125ce941eeSScott Wood kvmppc_set_pid(vcpu, spr_val);
213bc8080cbSHollis Blanchard break;
214bc8080cbSHollis Blanchard case SPRN_PID1:
215dd9ebf1fSLiu Yu if (spr_val != 0)
216dd9ebf1fSLiu Yu return EMULATE_FAIL;
21754771e62SAlexander Graf vcpu_e500->pid[1] = spr_val;
21854771e62SAlexander Graf break;
219bc8080cbSHollis Blanchard case SPRN_PID2:
220dd9ebf1fSLiu Yu if (spr_val != 0)
221dd9ebf1fSLiu Yu return EMULATE_FAIL;
22254771e62SAlexander Graf vcpu_e500->pid[2] = spr_val;
22354771e62SAlexander Graf break;
224bc8080cbSHollis Blanchard case SPRN_MAS0:
22554771e62SAlexander Graf vcpu->arch.shared->mas0 = spr_val;
22654771e62SAlexander Graf break;
227bc8080cbSHollis Blanchard case SPRN_MAS1:
22854771e62SAlexander Graf vcpu->arch.shared->mas1 = spr_val;
22954771e62SAlexander Graf break;
230bc8080cbSHollis Blanchard case SPRN_MAS2:
23154771e62SAlexander Graf vcpu->arch.shared->mas2 = spr_val;
23254771e62SAlexander Graf break;
233bc8080cbSHollis Blanchard case SPRN_MAS3:
234b5904972SScott Wood vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
235b5904972SScott Wood vcpu->arch.shared->mas7_3 |= spr_val;
236dc83b8bcSScott Wood break;
237bc8080cbSHollis Blanchard case SPRN_MAS4:
23854771e62SAlexander Graf vcpu->arch.shared->mas4 = spr_val;
23954771e62SAlexander Graf break;
240bc8080cbSHollis Blanchard case SPRN_MAS6:
24154771e62SAlexander Graf vcpu->arch.shared->mas6 = spr_val;
24254771e62SAlexander Graf break;
243bc8080cbSHollis Blanchard case SPRN_MAS7:
244b5904972SScott Wood vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
245b5904972SScott Wood vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
246dc83b8bcSScott Wood break;
24773196cd3SScott Wood #endif
248d86be077SLiu Yu case SPRN_L1CSR0:
249d86be077SLiu Yu vcpu_e500->l1csr0 = spr_val;
250d86be077SLiu Yu vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
251d86be077SLiu Yu break;
252bc8080cbSHollis Blanchard case SPRN_L1CSR1:
25354771e62SAlexander Graf vcpu_e500->l1csr1 = spr_val;
25407fec1c2SAlexander Graf vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR);
25554771e62SAlexander Graf break;
256bc8080cbSHollis Blanchard case SPRN_HID0:
25754771e62SAlexander Graf vcpu_e500->hid0 = spr_val;
25854771e62SAlexander Graf break;
259bc8080cbSHollis Blanchard case SPRN_HID1:
26054771e62SAlexander Graf vcpu_e500->hid1 = spr_val;
26154771e62SAlexander Graf break;
262bc8080cbSHollis Blanchard
263b0a1835dSLiu Yu case SPRN_MMUCSR0:
264b0a1835dSLiu Yu emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
2658e5b26b5SAlexander Graf spr_val);
266b0a1835dSLiu Yu break;
267b0a1835dSLiu Yu
268debf27d6SMihai Caraman case SPRN_PWRMGTCR0:
269debf27d6SMihai Caraman /*
270debf27d6SMihai Caraman * Guest relies on host power management configurations
271debf27d6SMihai Caraman * Treat the request as a general store
272debf27d6SMihai Caraman */
273debf27d6SMihai Caraman vcpu->arch.pwrmgtcr0 = spr_val;
274debf27d6SMihai Caraman break;
275debf27d6SMihai Caraman
27698518c4dSDiana Craciun case SPRN_BUCSR:
27798518c4dSDiana Craciun /*
27898518c4dSDiana Craciun * If we are here, it means that we have already flushed the
27998518c4dSDiana Craciun * branch predictor, so just return to guest.
28098518c4dSDiana Craciun */
28198518c4dSDiana Craciun break;
28298518c4dSDiana Craciun
283bb3a8a17SHollis Blanchard /* extra exceptions */
28495d80a29SMihai Caraman #ifdef CONFIG_SPE_POSSIBLE
285bb3a8a17SHollis Blanchard case SPRN_IVOR32:
2868e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
287bb3a8a17SHollis Blanchard break;
288bb3a8a17SHollis Blanchard case SPRN_IVOR33:
2898e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
290bb3a8a17SHollis Blanchard break;
291bb3a8a17SHollis Blanchard case SPRN_IVOR34:
2928e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
293bb3a8a17SHollis Blanchard break;
29495d80a29SMihai Caraman #endif
29595d80a29SMihai Caraman #ifdef CONFIG_ALTIVEC
29695d80a29SMihai Caraman case SPRN_IVOR32:
29795d80a29SMihai Caraman vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL] = spr_val;
29895d80a29SMihai Caraman break;
29995d80a29SMihai Caraman case SPRN_IVOR33:
30095d80a29SMihai Caraman vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST] = spr_val;
30195d80a29SMihai Caraman break;
30295d80a29SMihai Caraman #endif
303bb3a8a17SHollis Blanchard case SPRN_IVOR35:
3048e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
305bb3a8a17SHollis Blanchard break;
30673196cd3SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
30773196cd3SScott Wood case SPRN_IVOR36:
30873196cd3SScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
30973196cd3SScott Wood break;
31073196cd3SScott Wood case SPRN_IVOR37:
31173196cd3SScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
31273196cd3SScott Wood break;
31373196cd3SScott Wood #endif
314bc8080cbSHollis Blanchard default:
31554771e62SAlexander Graf emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
316bc8080cbSHollis Blanchard }
317bc8080cbSHollis Blanchard
318bc8080cbSHollis Blanchard return emulated;
319bc8080cbSHollis Blanchard }
320bc8080cbSHollis Blanchard
kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu * vcpu,int sprn,ulong * spr_val)3213a167beaSAneesh Kumar K.V int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
322bc8080cbSHollis Blanchard {
323bc8080cbSHollis Blanchard struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
324bc8080cbSHollis Blanchard int emulated = EMULATE_DONE;
325bc8080cbSHollis Blanchard
326bc8080cbSHollis Blanchard switch (sprn) {
32773196cd3SScott Wood #ifndef CONFIG_KVM_BOOKE_HV
328bc8080cbSHollis Blanchard case SPRN_PID:
32954771e62SAlexander Graf *spr_val = vcpu_e500->pid[0];
33054771e62SAlexander Graf break;
331bc8080cbSHollis Blanchard case SPRN_PID1:
33254771e62SAlexander Graf *spr_val = vcpu_e500->pid[1];
33354771e62SAlexander Graf break;
334bc8080cbSHollis Blanchard case SPRN_PID2:
33554771e62SAlexander Graf *spr_val = vcpu_e500->pid[2];
33654771e62SAlexander Graf break;
337bc8080cbSHollis Blanchard case SPRN_MAS0:
33854771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas0;
33954771e62SAlexander Graf break;
340bc8080cbSHollis Blanchard case SPRN_MAS1:
34154771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas1;
34254771e62SAlexander Graf break;
343bc8080cbSHollis Blanchard case SPRN_MAS2:
34454771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas2;
34554771e62SAlexander Graf break;
346bc8080cbSHollis Blanchard case SPRN_MAS3:
34754771e62SAlexander Graf *spr_val = (u32)vcpu->arch.shared->mas7_3;
348b5904972SScott Wood break;
349bc8080cbSHollis Blanchard case SPRN_MAS4:
35054771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas4;
35154771e62SAlexander Graf break;
352bc8080cbSHollis Blanchard case SPRN_MAS6:
35354771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas6;
35454771e62SAlexander Graf break;
355bc8080cbSHollis Blanchard case SPRN_MAS7:
35654771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas7_3 >> 32;
357b5904972SScott Wood break;
35873196cd3SScott Wood #endif
35921bd000aSBharat Bhushan case SPRN_DECAR:
36021bd000aSBharat Bhushan *spr_val = vcpu->arch.decar;
36121bd000aSBharat Bhushan break;
362bc8080cbSHollis Blanchard case SPRN_TLB0CFG:
36354771e62SAlexander Graf *spr_val = vcpu->arch.tlbcfg[0];
36454771e62SAlexander Graf break;
365bc8080cbSHollis Blanchard case SPRN_TLB1CFG:
36654771e62SAlexander Graf *spr_val = vcpu->arch.tlbcfg[1];
36754771e62SAlexander Graf break;
368307d9008SMihai Caraman case SPRN_TLB0PS:
369307d9008SMihai Caraman if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
370307d9008SMihai Caraman return EMULATE_FAIL;
371307d9008SMihai Caraman *spr_val = vcpu->arch.tlbps[0];
372307d9008SMihai Caraman break;
373307d9008SMihai Caraman case SPRN_TLB1PS:
374307d9008SMihai Caraman if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
375307d9008SMihai Caraman return EMULATE_FAIL;
376307d9008SMihai Caraman *spr_val = vcpu->arch.tlbps[1];
377307d9008SMihai Caraman break;
378d86be077SLiu Yu case SPRN_L1CSR0:
37954771e62SAlexander Graf *spr_val = vcpu_e500->l1csr0;
38054771e62SAlexander Graf break;
381bc8080cbSHollis Blanchard case SPRN_L1CSR1:
38254771e62SAlexander Graf *spr_val = vcpu_e500->l1csr1;
38354771e62SAlexander Graf break;
384bc8080cbSHollis Blanchard case SPRN_HID0:
38554771e62SAlexander Graf *spr_val = vcpu_e500->hid0;
38654771e62SAlexander Graf break;
387bc8080cbSHollis Blanchard case SPRN_HID1:
38854771e62SAlexander Graf *spr_val = vcpu_e500->hid1;
38954771e62SAlexander Graf break;
39090d34b0eSScott Wood case SPRN_SVR:
39154771e62SAlexander Graf *spr_val = vcpu_e500->svr;
39254771e62SAlexander Graf break;
393bc8080cbSHollis Blanchard
394b0a1835dSLiu Yu case SPRN_MMUCSR0:
39554771e62SAlexander Graf *spr_val = 0;
39654771e62SAlexander Graf break;
397b0a1835dSLiu Yu
39806579dd9SLiu Yu case SPRN_MMUCFG:
39954771e62SAlexander Graf *spr_val = vcpu->arch.mmucfg;
40054771e62SAlexander Graf break;
4019a6061d7SMihai Caraman case SPRN_EPTCFG:
4029a6061d7SMihai Caraman if (!has_feature(vcpu, VCPU_FTR_MMU_V2))
4039a6061d7SMihai Caraman return EMULATE_FAIL;
4049a6061d7SMihai Caraman /*
4059a6061d7SMihai Caraman * Legacy Linux guests access EPTCFG register even if the E.PT
4069a6061d7SMihai Caraman * category is disabled in the VM. Give them a chance to live.
4079a6061d7SMihai Caraman */
4089a6061d7SMihai Caraman *spr_val = vcpu->arch.eptcfg;
4099a6061d7SMihai Caraman break;
41006579dd9SLiu Yu
411debf27d6SMihai Caraman case SPRN_PWRMGTCR0:
412debf27d6SMihai Caraman *spr_val = vcpu->arch.pwrmgtcr0;
413debf27d6SMihai Caraman break;
414debf27d6SMihai Caraman
415bb3a8a17SHollis Blanchard /* extra exceptions */
41695d80a29SMihai Caraman #ifdef CONFIG_SPE_POSSIBLE
417bb3a8a17SHollis Blanchard case SPRN_IVOR32:
41854771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
419bb3a8a17SHollis Blanchard break;
420bb3a8a17SHollis Blanchard case SPRN_IVOR33:
42154771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
422bb3a8a17SHollis Blanchard break;
423bb3a8a17SHollis Blanchard case SPRN_IVOR34:
42454771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
425bb3a8a17SHollis Blanchard break;
42695d80a29SMihai Caraman #endif
42795d80a29SMihai Caraman #ifdef CONFIG_ALTIVEC
42895d80a29SMihai Caraman case SPRN_IVOR32:
42995d80a29SMihai Caraman *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_UNAVAIL];
43095d80a29SMihai Caraman break;
43195d80a29SMihai Caraman case SPRN_IVOR33:
43295d80a29SMihai Caraman *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALTIVEC_ASSIST];
43395d80a29SMihai Caraman break;
43495d80a29SMihai Caraman #endif
435bb3a8a17SHollis Blanchard case SPRN_IVOR35:
43654771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
437bb3a8a17SHollis Blanchard break;
43873196cd3SScott Wood #ifdef CONFIG_KVM_BOOKE_HV
43973196cd3SScott Wood case SPRN_IVOR36:
44054771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
44173196cd3SScott Wood break;
44273196cd3SScott Wood case SPRN_IVOR37:
44354771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
44473196cd3SScott Wood break;
44573196cd3SScott Wood #endif
446bc8080cbSHollis Blanchard default:
44754771e62SAlexander Graf emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
448bc8080cbSHollis Blanchard }
449bc8080cbSHollis Blanchard
450bc8080cbSHollis Blanchard return emulated;
451bc8080cbSHollis Blanchard }
452bc8080cbSHollis Blanchard
453