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Searched refs:simm (Results 1 – 16 of 16) sorted by relevance

/openbmc/u-boot/post/lib_powerpc/
H A Dcpu_asm.h126 #define ASM_11I(opcode, rd, rs, simm) ((opcode) + \ argument
129 ((simm) & 0xffff))
130 #define ASM_11IF(opcode, rd, rs, simm) ((opcode) + \ argument
133 ((simm) << 11))
182 #define ASM_ADDI(rd, rs, simm) ASM_11I(OP_ADDI, rd, rs, simm) argument
184 #define ASM_STW(rd, rs, simm) ASM_11I(OP_STW, rd, rs, simm) argument
185 #define ASM_LWZ(rd, rs, simm) ASM_11I(OP_LWZ, rd, rs, simm) argument
199 #define ASM_LMW(rd, rs, simm) ASM_11I(OP_LMW, rd, rs, simm) argument
200 #define ASM_STMW(rd, rs, simm) ASM_11I(OP_STMW, rd, rs, simm) argument
201 #define ASM_LSWI(rd, rs, simm) ASM_11IF(OP_LSWI, rd, rs, simm) argument
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/openbmc/qemu/hw/ppc/
H A Drs6000_mc.c38 MemoryRegion simm[6]; member
112 memory_region_set_enabled(&s->simm[socket - 1], size != 0); in rs6000mc_port0820_write()
113 memory_region_set_address(&s->simm[socket - 1], in rs6000mc_port0820_write()
168 memory_region_init_ram(&s->simm[socket], OBJECT(dev), name, in rs6000mc_realize()
175 &s->simm[socket], socket); in rs6000mc_realize()
190 memory_region_set_enabled(&s->simm[socket], true); in rs6000mc_realize()
191 memory_region_set_address(&s->simm[socket], start_address); in rs6000mc_realize()
192 start_address += memory_region_size(&s->simm[socket]); in rs6000mc_realize()
/openbmc/qemu/target/cris/
H A Dtranslate_v10.c.inc215 int32_t imm, simm;
221 simm = (int8_t) (imm << 2);
222 simm >>= 2;
228 simm = (int8_t)dc->ir;
244 c = tcg_constant_tl(simm);
252 c = tcg_constant_tl(simm);
268 c = tcg_constant_tl(simm);
961 int simm = dc->ir & 0xff;
965 simm = (int8_t)simm;
985 int32_t simm;
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H A Dtranslate.c2658 int32_t simm; in dec_bas_im() local
2661 simm = cris_fetch(env, dc, dc->pc + 2, 4, 0); in dec_bas_im()
2663 LOG_DIS("bas 0x%x, $p%u\n", dc->pc + simm, dc->op2); in dec_bas_im()
2669 dc->jmp_pc = dc->pc + simm; in dec_bas_im()
2676 int32_t simm; in dec_basc_im() local
2678 simm = cris_fetch(env, dc, dc->pc + 2, 4, 0); in dec_basc_im()
2680 LOG_DIS("basc 0x%x, $p%u\n", dc->pc + simm, dc->op2); in dec_basc_im()
2686 dc->jmp_pc = dc->pc + simm; in dec_basc_im()
/openbmc/qemu/hw/intc/
H A Ds390_flic.c143 flic->simm &= ~AIS_MODE_MASK(isc); in qemu_s390_modify_ais_mode()
147 flic->simm |= AIS_MODE_MASK(isc); in qemu_s390_modify_ais_mode()
172 if (flag && (flic->simm & AIS_MODE_MASK(isc))) { in qemu_s390_inject_airq()
344 flic->simm = 0; in qemu_s390_flic_reset()
370 VMSTATE_UINT8(simm, QEMUS390FLICState),
H A Ds390_flic_kvm.c472 uint8_t simm; member
492 tmp->simm = ais.simm; in kvm_flic_ais_pre_save()
503 .simm = tmp->simm, in kvm_flic_ais_post_load()
529 VMSTATE_UINT8(simm, KVMS390FLICStateMigTmp),
/openbmc/linux/Documentation/virt/kvm/devices/
H A Ds390_flic.rst148 __u8 simm; /* Single-Interruption-Mode mask */
152 simm contains Single-Interruption-Mode mask for all ISCs, nimm contains
153 No-Interruption-Mode mask for all ISCs. Each bit in simm and nimm corresponds
154 to an ISC (MSB0 bit 0 to ISC 0 and so on). The combination of simm bit and
/openbmc/qemu/include/hw/s390x/
H A Ds390_flic.h118 uint8_t simm; member
/openbmc/qemu/linux-headers/asm-s390/
H A Dkvm.h55 __u8 simm; member
/openbmc/linux/tools/arch/s390/include/uapi/asm/
H A Dkvm.h55 __u8 simm; member
/openbmc/linux/arch/s390/include/uapi/asm/
H A Dkvm.h55 __u8 simm; member
/openbmc/linux/arch/s390/kvm/
H A Dinterrupt.c2352 ais.simm = fi->simm; in flic_ais_mode_get_all()
2592 (fi->simm & AIS_MODE_MASK(req.isc)) ? in modify_ais_mode()
2600 fi->simm &= ~AIS_MODE_MASK(req.isc); in modify_ais_mode()
2604 fi->simm |= AIS_MODE_MASK(req.isc); in modify_ais_mode()
2636 if (!ret && (fi->simm & AIS_MODE_MASK(adapter->isc))) { in kvm_s390_inject_airq()
2669 fi->simm = ais.simm; in flic_ais_mode_set_all()
3344 if (!(gi->origin->g1.simm & AIS_MODE_MASK(gaite->gisc)) || in aen_host_forward()
/openbmc/linux/arch/s390/include/asm/
H A Dkvm_host.h687 u8 simm; member
889 u8 simm; member
/openbmc/qemu/target/ppc/
H A Dtranslate.c3091 target_long simm = SIMM(ctx->opcode); in gen_addr_imm_index() local
3093 simm &= ~maskl; in gen_addr_imm_index()
3096 simm = (uint32_t)simm; in gen_addr_imm_index()
3098 tcg_gen_movi_tl(EA, simm); in gen_addr_imm_index()
3099 } else if (likely(simm != 0)) { in gen_addr_imm_index()
3100 tcg_gen_addi_tl(EA, cpu_gpr[rA(ctx->opcode)], simm); in gen_addr_imm_index()
/openbmc/qemu/target/ppc/translate/
H A Dvmx-impl.c.inc1439 int simm;
1446 simm = SIMM5(ctx->opcode);
1447 tcg_gen_gvec_dup_imm(vece, avr_full_offset(rD(ctx->opcode)), 16, 16, simm);
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc2104 int64_t simm = sextract64(a->rs1, 0, 5);
2107 MAXSZ(s), MAXSZ(s), simm);
2122 s1 = tcg_constant_i64(simm);