/openbmc/u-boot/board/freescale/bsc9132qds/ |
H A D | spl_minimal.c | 34 __raw_writel(CONFIG_SYS_DDR_INTERVAL_800, &ddr->sdram_interval); in sdram_init() 54 __raw_writel(CONFIG_SYS_DDR_INTERVAL_1333, &ddr->sdram_interval); in sdram_init()
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/openbmc/u-boot/board/sbc8641d/ |
H A D | sbc8641d.c | 118 ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram() 149 ddr->sdram_interval = CONFIG_SYS_DDR2_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8349emds/ |
H A D | mpc8349emds.c | 111 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram() 144 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8349itx/ |
H A D | mpc8349itx.c | 64 im->ddr.sdram_interval = in fixed_sdram() 76 debug("DDR:sdram_interval=0x%08x\n", im->ddr.sdram_interval); in fixed_sdram()
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/openbmc/u-boot/board/socrates/ |
H A D | sdram.c | 41 ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8308rdb/ |
H A D | sdram.c | 57 out_be32(&im->ddr.sdram_interval, CONFIG_SYS_DDR_INTERVAL); in fixed_sdram()
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/openbmc/u-boot/board/sbc8548/ |
H A D | ddr.c | 115 out_be32(&ddr->sdram_interval, 0x05080100); in fixed_sdram()
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/openbmc/u-boot/board/mpc8308_p1m/ |
H A D | sdram.c | 53 out_be32(&im->ddr.sdram_interval, CONFIG_SYS_DDR_INTERVAL); in fixed_sdram()
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/openbmc/u-boot/board/gdsys/mpc8308/ |
H A D | sdram.c | 58 out_be32(&im->ddr.sdram_interval, CONFIG_SYS_DDR_INTERVAL); in fixed_sdram()
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/openbmc/u-boot/drivers/ddr/fsl/ |
H A D | mpc85xx_ddr_gen1.c | 48 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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H A D | mpc86xx_ddr.c | 59 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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H A D | mpc85xx_ddr_gen3.c | 127 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs() 213 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval & 0xffff); in fsl_ddr_set_memctl_regs() 335 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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H A D | mpc85xx_ddr_gen2.c | 74 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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H A D | fsl_ddr_gen4.c | 189 ddr_out32(&ddr->sdram_interval, in fsl_ddr_set_memctl_regs() 192 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs() 491 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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/openbmc/u-boot/board/freescale/mpc8315erdb/ |
H A D | sdram.c | 78 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/bsc9131rdb/ |
H A D | spl_minimal.c | 40 __raw_writel(CONFIG_SYS_DDR_INTERVAL_800, &ddr->sdram_interval); in sdram_init()
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/openbmc/u-boot/board/freescale/mpc832xemds/ |
H A D | mpc832xemds.c | 144 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8313erdb/ |
H A D | sdram.c | 89 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/drivers/ram/ |
H A D | mpc83xx_sdram.c | 357 u32 sdram_interval; in mpc83xx_sdram_probe() local 1045 sdram_interval = refresh_interval << SDRAM_INTERVAL_REFINT_SHIFT | in mpc83xx_sdram_probe() 1048 out_be32(&im->ddr.sdram_interval, sdram_interval); in mpc83xx_sdram_probe()
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/openbmc/u-boot/board/freescale/mpc8641hpcn/ |
H A D | mpc8641hpcn.c | 79 ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/sbc8349/ |
H A D | sbc8349.c | 118 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8323erdb/ |
H A D | mpc8323erdb.c | 122 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc8572ds/ |
H A D | mpc8572ds.c | 76 ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/mpc837xerdb/ |
H A D | mpc837xerdb.c | 119 im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL; in fixed_sdram()
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/openbmc/u-boot/board/freescale/ls1021aiot/ |
H A D | ls1021aiot.c | 69 out_be32(&ddr->sdram_interval, DDR_SDRAM_INTERVAL); in ddrmc_init()
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