| /openbmc/u-boot/drivers/gpio/ |
| H A D | sh_pfc.c | 33 unsigned long reg_width) in gpio_read_raw_reg() argument
35 switch (reg_width) { in gpio_read_raw_reg()
50 unsigned long reg_width, in gpio_write_raw_reg() argument
53 switch (reg_width) { in gpio_write_raw_reg()
74 pos = dr->reg_width - (in_pos + 1); in gpio_read_bit()
77 dr->reg + offset, pos, dr->reg_width); in gpio_read_bit()
80 dr->reg_width) >> pos) & 1; in gpio_read_bit()
88 pos = dr->reg_width - (in_pos + 1); in gpio_write_bit()
92 dr->reg, !!value, pos, dr->reg_width); in gpio_write_bit()
99 gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow); in gpio_write_bit()
[all …]
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| /openbmc/u-boot/drivers/reset/ |
| H A D | reset-socfpga.c | 34 int reg_width = sizeof(u32); in socfpga_reset_assert() local
35 int bank = id / (reg_width * BITS_PER_BYTE); in socfpga_reset_assert()
36 int offset = id % (reg_width * BITS_PER_BYTE); in socfpga_reset_assert()
46 int reg_width = sizeof(u32); in socfpga_reset_deassert() local
47 int bank = id / (reg_width * BITS_PER_BYTE); in socfpga_reset_deassert()
48 int offset = id % (reg_width * BITS_PER_BYTE); in socfpga_reset_deassert()
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| /openbmc/qemu/include/hw/sh4/ |
| H A D | sh_intc.h | 23 unsigned long set_reg, clr_reg, reg_width; member
29 unsigned long set_reg, clr_reg, reg_width, field_width; member
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| /openbmc/u-boot/include/ |
| H A D | sh_pfc.h | 45 unsigned long reg, reg_width, field_width; member
52 .reg = r, .reg_width = r_width, .field_width = f_width, \
57 .reg = r, .reg_width = r_width, \
63 unsigned long reg, reg_width, reg_shadow; member
69 .reg = r, .reg_width = r_width, \
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| H A D | ns16550.h | 58 int reg_width; member
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| H A D | serial.h | 146 u8 reg_width; member
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| /openbmc/u-boot/drivers/pinctrl/renesas/ |
| H A D | pfc.c | 89 u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width) in sh_pfc_read_raw_reg() argument
91 switch (reg_width) { in sh_pfc_read_raw_reg()
104 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, in sh_pfc_write_raw_reg() argument
107 switch (reg_width) { in sh_pfc_write_raw_reg()
150 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width); in sh_pfc_config_reg_helper()
153 *posp = crp->reg_width; in sh_pfc_config_reg_helper()
173 crp->reg, value, field, crp->reg_width, crp->field_width); in sh_pfc_write_config_reg()
178 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width); in sh_pfc_write_config_reg()
185 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); in sh_pfc_write_config_reg()
197 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
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| H A D | sh_pfc.h | 98 u8 reg_width, field_width; member
114 .reg = r, .reg_width = r_width, .field_width = f_width, \
129 .reg = r, .reg_width = r_width, \
166 u8 reg_width; member
179 .reg = r, .reg_width = r_width, \
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| /openbmc/qemu/target/arm/ |
| H A D | gdbstub64.c | 292 static void output_vector_union_type(GDBFeatureBuilder *builder, int reg_width, in output_vector_union_type() argument
330 vec_lanes[i].gdb_type, reg_width / vec_lanes[i].size); in output_vector_union_type()
367 int reg_width = cpu->sve_max_vq * 128; in arm_gen_dynamic_svereg_feature() local
379 output_vector_union_type(&builder, reg_width, "svev"); in arm_gen_dynamic_svereg_feature()
389 gdb_feature_builder_append_reg(&builder, name, reg_width, reg++, in arm_gen_dynamic_svereg_feature()
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| /openbmc/u-boot/drivers/serial/ |
| H A D | ns16550.c | 404 info->reg_width = plat->reg_width; in ns16550_serial_getinfo()
484 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); in ns16550_serial_ofdata_to_platdata()
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| H A D | sandbox.c | 198 .reg_width = 1, in sandbox_serial_getinfo()
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| /openbmc/qemu/hw/intc/ |
| H A D | sh_intc.c | 146 *first = mr->reg_width - 1; in sh_intc_locate()
162 *first = pr->reg_width / pr->field_width - 1; in sh_intc_locate()
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| /openbmc/u-boot/arch/x86/lib/ |
| H A D | acpi_table.c | 386 serial_width = serial_info.reg_width * 8; in acpi_create_spcr()
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