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Searched refs:regCC_GC_SA_UNIT_DISABLE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0.c203 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SA_UNIT_DISABLE, 0x00fffc01, 0xe0000000),
274 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SA_UNIT_DISABLE, 0x00fffc01, 0xe0000000),
H A Dimu_v11_0_3.c57 IMU_RLC_RAM_GOLDEN_VALUE(GC, 0, regCC_GC_SA_UNIT_DISABLE, 0x00fffc01, 0xe0000000),
H A Dgfx_v11_0.c1562 gc_disabled_sa_mask = RREG32_SOC15(GC, 0, regCC_GC_SA_UNIT_DISABLE); in gfx_v11_0_get_sa_active_bitmap()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_3_offset.h2134 #define regCC_GC_SA_UNIT_DISABLE … macro
H A Dgc_11_0_0_offset.h2072 #define regCC_GC_SA_UNIT_DISABLE … macro