| /openbmc/qemu/hw/core/ |
| H A D | qdev-clock.c | 77 Clock *qdev_init_clock_in(DeviceState *dev, const char *name, in qdev_init_clock_in() function
103 *clkp = qdev_init_clock_in(dev, elem->name, elem->callback, dev, in qdev_init_clocks()
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| /openbmc/qemu/hw/arm/ |
| H A D | stm32f100_soc.c | 62 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in stm32f100_soc_initfn()
63 s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); in stm32f100_soc_initfn()
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| H A D | msf2-soc.c | 78 s->m3clk = qdev_init_clock_in(DEVICE(obj), "m3clk", NULL, NULL, 0); in m2sxxx_soc_initfn()
79 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", NULL, NULL, 0); in m2sxxx_soc_initfn()
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| H A D | stm32f205_soc.c | 79 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in stm32f205_soc_initfn()
80 s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); in stm32f205_soc_initfn()
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| H A D | stm32f405_soc.c | 87 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in stm32f405_soc_initfn()
88 s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); in stm32f405_soc_initfn()
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| H A D | max78000_soc.c | 50 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in max78000_soc_initfn()
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| H A D | nrf51_soc.c | 208 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in nrf51_soc_init()
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| H A D | armv7m.c | 276 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", NULL, NULL, 0); in armv7m_instance_init()
277 s->cpuclk = qdev_init_clock_in(DEVICE(obj), "cpuclk", NULL, NULL, 0); in armv7m_instance_init()
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| H A D | aspeed_ast27x0-tsp.c | 138 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in aspeed_soc_ast27x0tsp_init()
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| H A D | aspeed_ast27x0-ssp.c | 138 s->sysclk = qdev_init_clock_in(DEVICE(s), "sysclk", NULL, NULL, 0); in aspeed_soc_ast27x0ssp_init()
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| /openbmc/qemu/include/hw/ |
| H A D | qdev-clock.h | 33 Clock *qdev_init_clock_in(DeviceState *dev, const char *name,
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| /openbmc/qemu/hw/misc/ |
| H A D | bcm2835_cprman.c | 119 s->xosc_in = qdev_init_clock_in(DEVICE(s), "xosc-in", pll_xosc_update, in pll_init()
224 s->pll_in = qdev_init_clock_in(DEVICE(s), "pll-in", in pll_channel_init()
342 s->srcs[i] = qdev_init_clock_in(DEVICE(s), name, in clock_mux_init()
402 s->plla_in = qdev_init_clock_in(dev, "plla-in", dsi0hsck_mux_in_update, in dsi0hsck_mux_init()
404 s->plld_in = qdev_init_clock_in(dev, "plld-in", dsi0hsck_mux_in_update, in dsi0hsck_mux_init()
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| H A D | npcm_clk.c | 689 pll->clock_in = qdev_init_clock_in(DEVICE(pll), "clock-in", in npcm7xx_clk_pll_init()
707 sel->clock_in[i] = qdev_init_clock_in(DEVICE(sel), s, in npcm7xx_clk_sel_init()
722 div->clock_in = qdev_init_clock_in(DEVICE(div), "clock-in", in npcm7xx_clk_divider_init()
983 s->clkref = qdev_init_clock_in(DEVICE(s), "clkref", NULL, NULL, 0); in npcm7xx_clk_init_clock_hierarchy()
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| H A D | stm32l4x5_syscfg.c | 231 s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0); in stm32l4x5_syscfg_init()
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| /openbmc/qemu/hw/timer/ |
| H A D | armv7m_systick.c | 252 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", in systick_instance_init()
254 s->cpuclk = qdev_init_clock_in(DEVICE(obj), "cpuclk", in systick_instance_init()
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| H A D | cmsdk-apb-timer.c | 225 s->pclk = qdev_init_clock_in(DEVICE(s), "pclk", in cmsdk_apb_timer_init()
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| H A D | stellaris-gptm.c | 295 s->clk = qdev_init_clock_in(dev, "clk", NULL, NULL, 0); in stellaris_gptm_init()
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| H A D | sse-counter.c | 421 s->clk = qdev_init_clock_in(DEVICE(obj), "CLK", sse_clk_callback, s, in sse_counter_init()
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| /openbmc/qemu/docs/devel/ |
| H A D | clocks.rst | 82 To add an input clock to a device, the function ``qdev_init_clock_in()``
88 qdev_init_clock_in(DEVICE(dev), "clk_in", clk_in_callback, dev, ClockUpdate);
99 ``qdev_init_clock_in/out()`` for each clock in the array. To ease the array
162 * by passing it as an argument to ``qdev_init_clock_in()``
173 The ``opaque`` argument is the pointer passed to ``qdev_init_clock_in()``
302 clk = qdev_init_clock_in(DEVICE(dev), "clk-in", clk_in_callback,
347 * 'opaque' is the argument passed to qdev_init_clock_in();
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| /openbmc/qemu/hw/mips/ |
| H A D | cps.c | 41 s->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, NULL, 0); in mips_cps_init()
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| /openbmc/qemu/hw/adc/ |
| H A D | npcm7xx_adc.c | 241 s->clock = qdev_init_clock_in(DEVICE(s), "clock", NULL, NULL, 0); in npcm7xx_adc_init()
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| /openbmc/qemu/hw/watchdog/ |
| H A D | cmsdk-apb-watchdog.c | 351 s->wdogclk = qdev_init_clock_in(DEVICE(s), "WDOGCLK", in cmsdk_apb_watchdog_init()
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| /openbmc/qemu/target/xtensa/ |
| H A D | cpu.c | 277 cpu->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, cpu, 0); in xtensa_cpu_initfn()
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| /openbmc/qemu/rust/qemu-api/src/ |
| H A D | qdev.rs | |
| /openbmc/qemu/hw/gpio/ |
| H A D | stm32l4x5_gpio.c | 410 s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0); in stm32l4x5_gpio_init()
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