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Searched refs:pwrdm (Results 1 – 25 of 31) sorted by relevance

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/openbmc/linux/arch/arm/mach-omap2/
H A Dpowerdomain.c69 pwrdm = NULL; in _pwrdm_lookup()
78 return pwrdm; in _pwrdm_lookup()
94 if (!pwrdm || !pwrdm->name) in _pwrdm_register()
114 pwrdm->name, pwrdm->voltdm.name); in _pwrdm_register()
134 pwrdm->state = pwrdm_read_pwrst(pwrdm); in _pwrdm_register()
135 pwrdm->state_counter[pwrdm->state] = 1; in _pwrdm_register()
393 spin_lock_irqsave(&pwrdm->_lock, pwrdm->_lock_flags); in pwrdm_lock()
512 if (!pwrdm) in pwrdm_get_mem_bank_count()
1001 if (pwrdm) in pwrdm_pre_transition()
1011 if (pwrdm) in pwrdm_post_transition()
[all …]
H A Dpowerdomain.h182 int (*pwrdm_read_pwrst)(struct powerdomain *pwrdm);
220 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
221 int pwrdm_read_pwrst(struct powerdomain *pwrdm);
222 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
236 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
238 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
241 int pwrdm_state_switch(struct powerdomain *pwrdm);
242 int pwrdm_pre_transition(struct powerdomain *pwrdm);
243 int pwrdm_post_transition(struct powerdomain *pwrdm);
269 extern void pwrdm_lock(struct powerdomain *pwrdm);
[all …]
H A Dprm33xx.c145 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_next_pwrst()
164 v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); in am33xx_pwrdm_read_pwrst()
175 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_lowpwrstchange()
183 pwrdm->prcm_offs, pwrdm->pwrstst_offs); in am33xx_pwrdm_clear_all_prev_pwrst()
196 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_logic_retst()
205 v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); in am33xx_pwrdm_read_logic_pwrst()
237 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_mem_onst()
252 pwrdm->prcm_offs, pwrdm->pwrstctrl_offs); in am33xx_pwrdm_set_mem_retst()
265 v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs); in am33xx_pwrdm_read_mem_pwrst()
339 pwrdm->context = am33xx_prm_read_reg(pwrdm->prcm_offs, in am33xx_pwrdm_save_context()
[all …]
H A Dpm-debug.c62 pwrdm->state_timer[prev] += t - pwrdm->timer; in pm_dbg_update_time()
64 pwrdm->timer = t; in pm_dbg_update_time()
92 if (pwrdm->state != pwrdm_read_pwrst(pwrdm)) in pwrdm_dbg_show_counter()
94 pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm)); in pwrdm_dbg_show_counter()
100 pwrdm->state_counter[i]); in pwrdm_dbg_show_counter()
103 for (i = 0; i < pwrdm->banks; i++) in pwrdm_dbg_show_counter()
105 pwrdm->ret_mem_off_counter[i]); in pwrdm_dbg_show_counter()
121 pwrdm_state_switch(pwrdm); in pwrdm_dbg_show_timer()
128 pwrdm->state_timer[i]); in pwrdm_dbg_show_timer()
183 pwrdm->state_timer[i] = 0; in pwrdms_setup()
[all …]
H A Dprm44xx.c440 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_next_pwrst()
452 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_pwrst()
464 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_prev_pwrst()
496 pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_set_logic_retst()
510 pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_set_mem_onst()
524 pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_set_mem_retst()
534 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_logic_pwrst()
546 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_logic_retst()
588 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_mem_pwrst()
602 v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs, in omap4_pwrdm_read_mem_retst()
[all …]
H A Dclockdomains33xx_data.c19 .pwrdm = { .name = "per_pwrdm" },
27 .pwrdm = { .name = "per_pwrdm" },
35 .pwrdm = { .name = "per_pwrdm" },
43 .pwrdm = { .name = "per_pwrdm" },
51 .pwrdm = { .name = "per_pwrdm" },
59 .pwrdm = { .name = "per_pwrdm" },
67 .pwrdm = { .name = "per_pwrdm" },
75 .pwrdm = { .name = "per_pwrdm" },
83 .pwrdm = { .name = "per_pwrdm" },
91 .pwrdm = { .name = "per_pwrdm" },
[all …]
H A Dpm44xx.c27 struct powerdomain *pwrdm; member
66 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state); in omap4_pm_suspend()
83 state = pwrdm_read_prev_pwrst(pwrst->pwrdm); in omap4_pm_suspend()
86 pwrst->pwrdm->name, pwrst->next_state); in omap4_pm_suspend()
89 omap_set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state); in omap4_pm_suspend()
117 if (!pwrdm->pwrsts) in pwrdms_setup()
125 if (!strncmp(pwrdm->name, "cpu", 3)) { in pwrdms_setup()
131 if (!strncmp(pwrdm->name, "core", 4) || in pwrdms_setup()
132 !strncmp(pwrdm->name, "l4per", 5)) in pwrdms_setup()
133 pwrdm_set_logic_retst(pwrdm, PWRDM_POWER_OFF); in pwrdms_setup()
[all …]
H A Domap-iommu.c20 struct powerdomain *pwrdm; member
67 pwrdm = entry->pwrdm; in _get_pwrdm()
74 if (pwrdm) in _get_pwrdm()
75 return pwrdm; in _get_pwrdm()
96 pwrdm = clkdm_get_pwrdm(clkdm); in _get_pwrdm()
97 if (!pwrdm) { in _get_pwrdm()
105 entry->pwrdm = pwrdm; in _get_pwrdm()
111 return pwrdm; in _get_pwrdm()
117 struct powerdomain *pwrdm; in omap_iommu_set_pwrdm_constraint() local
121 pwrdm = _get_pwrdm(&pdev->dev); in omap_iommu_set_pwrdm_constraint()
[all …]
H A Dclockdomains43xx_data.c17 .pwrdm = { .name = "cefuse_pwrdm" },
26 .pwrdm = { .name = "mpu_pwrdm" },
35 .pwrdm = { .name = "per_pwrdm" },
53 .pwrdm = { .name = "rtc_pwrdm" },
62 .pwrdm = { .name = "per_pwrdm" },
71 .pwrdm = { .name = "per_pwrdm" },
80 .pwrdm = { .name = "wkup_pwrdm" },
89 .pwrdm = { .name = "per_pwrdm" },
98 .pwrdm = { .name = "per_pwrdm" },
116 .pwrdm = { .name = "per_pwrdm" },
[all …]
H A Dclockdomains81xx_data.c32 .pwrdm = { .name = "alwon_pwrdm" },
40 .pwrdm = { .name = "alwon_pwrdm" },
48 .pwrdm = { .name = "alwon_pwrdm" },
56 .pwrdm = { .name = "alwon_pwrdm" },
64 .pwrdm = { .name = "alwon_pwrdm" },
72 .pwrdm = { .name = "alwon_pwrdm" },
98 .pwrdm = { .name = "alwon_pwrdm" },
106 .pwrdm = { .name = "active_pwrdm" },
114 .pwrdm = { .name = "ivahd0_pwrdm" },
122 .pwrdm = { .name = "ivahd1_pwrdm" },
[all …]
H A Dprm2xxx_3xxx.c111 int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, in omap2_pwrdm_set_mem_onst() argument
124 int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, in omap2_pwrdm_set_mem_retst() argument
137 int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) in omap2_pwrdm_read_mem_pwrst() argument
147 int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank) in omap2_pwrdm_read_mem_retst() argument
153 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap2_pwrdm_read_mem_retst()
168 int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm) in omap2_pwrdm_wait_transition() argument
186 pwrdm->name); in omap2_pwrdm_wait_transition()
199 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); in omap2_clkdm_add_wkdep()
207 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP); in omap2_clkdm_del_wkdep()
214 return omap2_prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, in omap2_clkdm_read_wkdep()
[all …]
H A Dclockdomains3xxx_data.c224 .pwrdm = { .name = "mpu_pwrdm" },
233 .pwrdm = { .name = "mpu_pwrdm" },
259 .pwrdm = { .name = "gfx_pwrdm" },
268 .pwrdm = { .name = "sgx_pwrdm" },
277 .pwrdm = { .name = "sgx_pwrdm" },
327 .pwrdm = { .name = "dss_pwrdm" },
337 .pwrdm = { .name = "dss_pwrdm" },
347 .pwrdm = { .name = "cam_pwrdm" },
374 .pwrdm = { .name = "per_pwrdm" },
384 .pwrdm = { .name = "per_pwrdm" },
[all …]
H A Dclockdomains54xx_data.c166 .pwrdm = { .name = "core_pwrdm" },
178 .pwrdm = { .name = "iva_pwrdm" },
190 .pwrdm = { .name = "core_pwrdm" },
201 .pwrdm = { .name = "core_pwrdm" },
211 .pwrdm = { .name = "core_pwrdm" },
230 .pwrdm = { .name = "core_pwrdm" },
252 .pwrdm = { .name = "abe_pwrdm" },
262 .pwrdm = { .name = "dss_pwrdm" },
274 .pwrdm = { .name = "dsp_pwrdm" },
307 .pwrdm = { .name = "gpu_pwrdm" },
[all …]
H A Dclockdomains7xx_data.c336 .pwrdm = { .name = "cpu0_pwrdm" },
345 .pwrdm = { .name = "iva_pwrdm" },
366 .pwrdm = { .name = "ipu_pwrdm" },
424 .pwrdm = { .name = "vpe_pwrdm" },
436 .pwrdm = { .name = "mpu_pwrdm" },
456 .pwrdm = { .name = "ipu_pwrdm" },
508 .pwrdm = { .name = "rtc_pwrdm" },
547 .pwrdm = { .name = "dss_pwrdm" },
569 .pwrdm = { .name = "emu_pwrdm" },
602 .pwrdm = { .name = "cam_pwrdm" },
[all …]
H A Dclockdomains44xx_data.c164 .pwrdm = { .name = "core_pwrdm" },
174 .pwrdm = { .name = "tesla_pwrdm" },
186 .pwrdm = { .name = "gfx_pwrdm" },
232 .pwrdm = { .name = "abe_pwrdm" },
242 .pwrdm = { .name = "core_pwrdm" },
262 .pwrdm = { .name = "core_pwrdm" },
273 .pwrdm = { .name = "cpu0_pwrdm" },
322 .pwrdm = { .name = "mpu_pwrdm" },
353 .pwrdm = { .name = "cam_pwrdm" },
364 .pwrdm = { .name = "dss_pwrdm" },
[all …]
H A Dclockdomain.c75 struct powerdomain *pwrdm; in _clkdm_register() local
80 pwrdm = pwrdm_lookup(clkdm->pwrdm.name); in _clkdm_register()
81 if (!pwrdm) { in _clkdm_register()
83 clkdm->name, clkdm->pwrdm.name); in _clkdm_register()
86 clkdm->pwrdm.ptr = pwrdm; in _clkdm_register()
94 pwrdm_add_clkdm(pwrdm, clkdm); in _clkdm_register()
575 return clkdm->pwrdm.ptr; in clkdm_get_pwrdm()
872 pwrdm_lock(clkdm->pwrdm.ptr); in clkdm_sleep()
926 pwrdm_lock(clkdm->pwrdm.ptr); in clkdm_wakeup()
987 pwrdm_lock(clkdm->pwrdm.ptr); in clkdm_allow_idle()
[all …]
H A Dpm34xx.c56 struct powerdomain *pwrdm; member
321 if (pwrdm_clear_all_prev_pwrst(pwrst->pwrdm)) in omap3_pm_suspend()
332 state = pwrdm_read_prev_pwrst(pwrst->pwrdm); in omap3_pm_suspend()
335 pwrst->pwrdm->name, pwrst->next_state); in omap3_pm_suspend()
370 pwrst->pwrdm == core_pwrdm && in omap3_pm_off_mode_enable()
387 if (pwrst->pwrdm == pwrdm) in omap3_pm_get_suspend_state()
398 if (pwrst->pwrdm == pwrdm) { in omap3_pm_set_suspend_state()
410 if (!pwrdm->pwrsts) in pwrdms_setup()
416 pwrst->pwrdm = pwrdm; in pwrdms_setup()
425 if (pwrdm_has_hdwr_sar(pwrdm)) in pwrdms_setup()
[all …]
H A Dprm3xxx.c541 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap3_pwrdm_set_next_pwrst()
547 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_next_pwrst()
552 static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm) in omap3_pwrdm_read_pwrst() argument
554 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_pwrst()
562 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_prev_pwrst()
569 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_logic_pwrst()
576 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_logic_retst()
583 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_prev_logic_pwrst()
612 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap3_pwrdm_read_prev_mem_pwrst()
626 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap3_pwrdm_enable_hdwr_sar()
[all …]
H A Domap-mpuss-lowpower.c68 struct powerdomain *pwrdm; member
272 pwrdm_set_next_pwrst(pm_info->pwrdm, power_state); in omap4_enter_lowpower()
303 pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON); in omap4_enter_lowpower()
330 pwrdm_clear_all_prev_pwrst(pm_info->pwrdm); in omap4_hotplug_cpu()
331 pwrdm_set_next_pwrst(pm_info->pwrdm, power_state); in omap4_hotplug_cpu()
386 pm_info->pwrdm = pwrdm_lookup("cpu0_pwrdm"); in omap4_mpuss_init()
387 if (!pm_info->pwrdm) { in omap4_mpuss_init()
393 pwrdm_clear_all_prev_pwrst(pm_info->pwrdm); in omap4_mpuss_init()
411 pm_info->pwrdm = pwrdm_lookup("cpu1_pwrdm"); in omap4_mpuss_init()
412 if (!pm_info->pwrdm) { in omap4_mpuss_init()
[all …]
H A Dclockdomains2420_data.c81 .pwrdm = { .name = "mpu_pwrdm" },
89 .pwrdm = { .name = "dsp_pwrdm" },
98 .pwrdm = { .name = "dsp_pwrdm" },
105 .pwrdm = { .name = "gfx_pwrdm" },
113 .pwrdm = { .name = "core_pwrdm" },
121 .pwrdm = { .name = "core_pwrdm" },
129 .pwrdm = { .name = "core_pwrdm" },
H A Dclockdomains2430_data.c92 .pwrdm = { .name = "mpu_pwrdm" },
101 .pwrdm = { .name = "mdm_pwrdm" },
110 .pwrdm = { .name = "dsp_pwrdm" },
119 .pwrdm = { .name = "gfx_pwrdm" },
132 .pwrdm = { .name = "core_pwrdm" },
146 .pwrdm = { .name = "core_pwrdm" },
155 .pwrdm = { .name = "core_pwrdm" },
H A Dprm2xxx.c136 clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_sleep()
144 clkdm->pwrdm.ptr->prcm_offs, in omap2xxx_clkdm_wakeup()
149 static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) in omap2xxx_pwrdm_set_next_pwrst() argument
169 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap2xxx_pwrdm_set_next_pwrst()
173 static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) in omap2xxx_pwrdm_read_next_pwrst() argument
177 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap2xxx_pwrdm_read_next_pwrst()
184 static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm) in omap2xxx_pwrdm_read_pwrst() argument
188 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in omap2xxx_pwrdm_read_pwrst()
H A Dpowerdomains3xxx_data.c517 pwrdm->prcm_offs, TI81XX_PM_PWSTCTRL); in ti81xx_pwrdm_set_next_pwrst()
521 static int ti81xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) in ti81xx_pwrdm_read_next_pwrst() argument
523 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in ti81xx_pwrdm_read_next_pwrst()
528 static int ti81xx_pwrdm_read_pwrst(struct powerdomain *pwrdm) in ti81xx_pwrdm_read_pwrst() argument
530 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in ti81xx_pwrdm_read_pwrst()
531 (pwrdm->prcm_offs == TI814X_PRM_GFX_MOD) ? TI81XX_RM_RSTCTRL : in ti81xx_pwrdm_read_pwrst()
538 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, in ti81xx_pwrdm_read_logic_pwrst()
539 (pwrdm->prcm_offs == TI814X_PRM_GFX_MOD) ? TI81XX_RM_RSTCTRL : in ti81xx_pwrdm_read_logic_pwrst()
548 while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, in ti81xx_pwrdm_wait_transition()
549 (pwrdm->prcm_offs == TI814X_PRM_GFX_MOD) ? TI81XX_RM_RSTCTRL : in ti81xx_pwrdm_wait_transition()
[all …]
H A Dprm2xxx_3xxx.h107 extern int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
109 extern int omap2_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
111 extern int omap2_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
112 extern int omap2_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank);
113 extern int omap2_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
114 extern int omap2_pwrdm_wait_transition(struct powerdomain *pwrdm);
H A Dpm.h35 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
36 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
41 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
43 #define pm_dbg_update_time(pwrdm, prev) do {} while (0); argument

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