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Searched refs:priv (Results 1 – 25 of 898) sorted by relevance

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/openbmc/u-boot/drivers/ram/mediatek/
H A Dddr3-mt7629.c236 struct mtk_ddr3_priv *priv = dev_get_priv(dev); in mtk_ddr3_rank_size_detect() local
260 clrsetbits_le32(priv->emi + EMI_CONA, EMI_COL_ADDR_MASK, in mtk_ddr3_rank_size_detect()
268 struct mtk_ddr3_priv *priv = dev_get_priv(dev); in mtk_ddr3_init() local
271 ret = clk_set_parent(&priv->phy, &priv->phy_mux); in mtk_ddr3_init()
276 writel(0x00003010, priv->emi + EMI_CONA); in mtk_ddr3_init()
277 writel(0x00000000, priv->emi + EMI_CONF); in mtk_ddr3_init()
278 writel(0x000006b8, priv->emi + EMI_CONM); in mtk_ddr3_init()
280 writel(0x20c00, priv->dramc_ao + DRAMC_SHU1_DRVING1); in mtk_ddr3_init()
282 writel(0x8320c83, priv->dramc_ao + DRAMC_SHU1_DRVING2); in mtk_ddr3_init()
285 writel(0x2201, priv->dramc_ao + DRAMC_DRAMCTRL); in mtk_ddr3_init()
[all …]
/openbmc/u-boot/drivers/i2c/
H A Di2c-versatile.c28 static inline void versatile_sda_set(struct versatile_i2c_priv *priv, u8 state) in versatile_sda_set() argument
30 writel(SDA, priv->base + (state ? I2C_SET_REG : I2C_CLEAR_REG)); in versatile_sda_set()
31 udelay(priv->delay); in versatile_sda_set()
34 static inline int versatile_sda_get(struct versatile_i2c_priv *priv) in versatile_sda_get() argument
36 int v = !!(readl(priv->base + I2C_CONTROL_REG) & SDA); in versatile_sda_get()
38 udelay(priv->delay); in versatile_sda_get()
42 static inline void versatile_scl_set(struct versatile_i2c_priv *priv, u8 state) in versatile_scl_set() argument
44 writel(SCL, priv->base + (state ? I2C_SET_REG : I2C_CLEAR_REG)); in versatile_scl_set()
45 udelay(priv->delay); in versatile_scl_set()
48 static inline int versatile_scl_get(struct versatile_i2c_priv *priv) in versatile_scl_get() argument
[all …]
/openbmc/u-boot/drivers/spi/
H A Ddesignware_spi.c119 static inline u32 dw_read(struct dw_spi_priv *priv, u32 offset) in dw_read() argument
121 return __raw_readl(priv->regs + offset); in dw_read()
124 static inline void dw_write(struct dw_spi_priv *priv, u32 offset, u32 val) in dw_write() argument
126 __raw_writel(val, priv->regs + offset); in dw_write()
132 struct dw_spi_priv *priv = dev_get_priv(bus); in request_gpio_cs() local
136 ret = gpio_request_by_name(bus, "cs-gpio", 0, &priv->cs_gpio, 0); in request_gpio_cs()
145 if (dm_gpio_is_valid(&priv->cs_gpio)) { in request_gpio_cs()
146 dm_gpio_set_dir_flags(&priv->cs_gpio, in request_gpio_cs()
172 static inline void spi_enable_chip(struct dw_spi_priv *priv, int enable) in spi_enable_chip() argument
174 dw_write(priv, DW_SPI_SSIENR, (enable ? 1 : 0)); in spi_enable_chip()
[all …]
H A Dpic32_spi.c82 static inline void pic32_spi_enable(struct pic32_spi_priv *priv) in pic32_spi_enable() argument
84 writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.set); in pic32_spi_enable()
87 static inline void pic32_spi_disable(struct pic32_spi_priv *priv) in pic32_spi_disable() argument
89 writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.clr); in pic32_spi_disable()
92 static inline u32 pic32_spi_rx_fifo_level(struct pic32_spi_priv *priv) in pic32_spi_rx_fifo_level() argument
94 u32 sr = readl(&priv->regs->status.raw); in pic32_spi_rx_fifo_level()
99 static inline u32 pic32_spi_tx_fifo_level(struct pic32_spi_priv *priv) in pic32_spi_tx_fifo_level() argument
101 u32 sr = readl(&priv->regs->status.raw); in pic32_spi_tx_fifo_level()
107 static u32 pic32_tx_max(struct pic32_spi_priv *priv, int n_bytes) in pic32_tx_max() argument
111 tx_left = (priv->tx_end - priv->tx) / n_bytes; in pic32_tx_max()
[all …]
H A Dzynq_qspi.c119 static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv) in zynq_qspi_init_hw() argument
121 struct zynq_qspi_regs *regs = priv->regs; in zynq_qspi_init_hw()
161 struct zynq_qspi_priv *priv = dev_get_priv(bus); in zynq_qspi_probe() local
163 priv->regs = plat->regs; in zynq_qspi_probe()
164 priv->fifo_depth = ZYNQ_QSPI_FIFO_DEPTH; in zynq_qspi_probe()
167 zynq_qspi_init_hw(priv); in zynq_qspi_probe()
178 static void zynq_qspi_read_data(struct zynq_qspi_priv *priv, u32 data, u8 size) in zynq_qspi_read_data() argument
183 data, (unsigned)(priv->rx_buf), size); in zynq_qspi_read_data()
185 if (priv->rx_buf) { in zynq_qspi_read_data()
188 *((u8 *)priv->rx_buf) = data; in zynq_qspi_read_data()
[all …]
H A Domap3_spi.c122 static void omap3_spi_write_chconf(struct omap3_spi_priv *priv, int val) in omap3_spi_write_chconf() argument
124 writel(val, &priv->regs->channel[priv->cs].chconf); in omap3_spi_write_chconf()
126 readl(&priv->regs->channel[priv->cs].chconf); in omap3_spi_write_chconf()
129 static void omap3_spi_set_enable(struct omap3_spi_priv *priv, int enable) in omap3_spi_set_enable() argument
131 writel(enable, &priv->regs->channel[priv->cs].chctrl); in omap3_spi_set_enable()
133 readl(&priv->regs->channel[priv->cs].chctrl); in omap3_spi_set_enable()
136 static int omap3_spi_write(struct omap3_spi_priv *priv, unsigned int len, in omap3_spi_write() argument
142 chconf = readl(&priv->regs->channel[priv->cs].chconf); in omap3_spi_write()
145 omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_EN); in omap3_spi_write()
148 chconf |= (priv->wordlen - 1) << 7; in omap3_spi_write()
[all …]
H A Dfsl_qspi.c150 static inline int is_controller_busy(const struct fsl_qspi_priv *priv) in is_controller_busy() argument
158 val = qspi_read32(priv->flags, &priv->regs->sr); in is_controller_busy()
180 static void qspi_set_lut(struct fsl_qspi_priv *priv) in qspi_set_lut() argument
182 struct fsl_qspi_regs *regs = priv->regs; in qspi_set_lut()
186 qspi_write32(priv->flags, &regs->lutkey, LUT_KEY_VALUE); in qspi_set_lut()
187 qspi_write32(priv->flags, &regs->lckcr, QSPI_LCKCR_UNLOCK); in qspi_set_lut()
191 qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_WREN) | in qspi_set_lut()
193 qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0); in qspi_set_lut()
194 qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0); in qspi_set_lut()
195 qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0); in qspi_set_lut()
[all …]
H A Dbcmstb_spi.c130 static void bcmstb_spi_hw_set_parms(struct bcmstb_spi_priv *priv) in bcmstb_spi_hw_set_parms() argument
132 writel(SPBR_MIN, &priv->regs->spcr0_lsb); in bcmstb_spi_hw_set_parms()
133 writel(BITS_PER_WORD << 2 | SPI_MODE_3, &priv->regs->spcr0_msb); in bcmstb_spi_hw_set_parms()
163 struct bcmstb_spi_priv *priv = dev_get_priv(bus); in bcmstb_spi_probe() local
165 priv->regs = plat->base[HIF_MSPI]; in bcmstb_spi_probe()
166 priv->bspi = plat->base[BSPI]; in bcmstb_spi_probe()
167 priv->hif_spi_intr2 = plat->base[HIF_SPI_INTR2]; in bcmstb_spi_probe()
168 priv->cs_reg = plat->base[CS_REG]; in bcmstb_spi_probe()
169 priv->default_cs = 0; in bcmstb_spi_probe()
170 priv->curr_cs = -1; in bcmstb_spi_probe()
[all …]
H A Dti_qspi.c116 static void ti_spi_set_speed(struct ti_qspi_priv *priv, uint hz) in ti_spi_set_speed() argument
123 clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1; in ti_spi_set_speed()
132 writel(readl(&priv->base->clk_ctrl) & ~QSPI_CLK_EN, in ti_spi_set_speed()
133 &priv->base->clk_ctrl); in ti_spi_set_speed()
135 writel(QSPI_CLK_EN | clk_div, &priv->base->clk_ctrl); in ti_spi_set_speed()
138 static void ti_qspi_cs_deactivate(struct ti_qspi_priv *priv) in ti_qspi_cs_deactivate() argument
140 writel(priv->cmd | QSPI_INVAL, &priv->base->cmd); in ti_qspi_cs_deactivate()
142 readl(&priv->base->cmd); in ti_qspi_cs_deactivate()
145 static int __ti_qspi_set_mode(struct ti_qspi_priv *priv, unsigned int mode) in __ti_qspi_set_mode() argument
147 priv->dc = 0; in __ti_qspi_set_mode()
[all …]
H A Dfsl_dspi.c103 struct fsl_dspi_priv priv; member
132 static void dspi_halt(struct fsl_dspi_priv *priv, u8 halt) in dspi_halt() argument
136 mcr_val = dspi_read32(priv->flags, &priv->regs->mcr); in dspi_halt()
143 dspi_write32(priv->flags, &priv->regs->mcr, mcr_val); in dspi_halt()
146 static void fsl_dspi_init_mcr(struct fsl_dspi_priv *priv, uint cfg_val) in fsl_dspi_init_mcr() argument
149 dspi_halt(priv, 1); in fsl_dspi_init_mcr()
151 dspi_write32(priv->flags, &priv->regs->mcr, cfg_val); in fsl_dspi_init_mcr()
154 dspi_halt(priv, 0); in fsl_dspi_init_mcr()
156 priv->mcr_val = cfg_val; in fsl_dspi_init_mcr()
159 static void fsl_dspi_cfg_cs_active_state(struct fsl_dspi_priv *priv, in fsl_dspi_cfg_cs_active_state() argument
[all …]
/openbmc/u-boot/drivers/net/
H A Dmtk_eth.c155 int (*mii_read)(struct mtk_eth_priv *priv, u8 phy, u8 reg);
156 int (*mii_write)(struct mtk_eth_priv *priv, u8 phy, u8 reg, u16 val);
157 int (*mmd_read)(struct mtk_eth_priv *priv, u8 addr, u8 devad, u16 reg);
158 int (*mmd_write)(struct mtk_eth_priv *priv, u8 addr, u8 devad, u16 reg,
172 int (*switch_init)(struct mtk_eth_priv *priv);
183 static void mtk_pdma_write(struct mtk_eth_priv *priv, u32 reg, u32 val) in mtk_pdma_write() argument
185 writel(val, priv->fe_base + PDMA_BASE + reg); in mtk_pdma_write()
188 static void mtk_pdma_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr, in mtk_pdma_rmw() argument
191 clrsetbits_le32(priv->fe_base + PDMA_BASE + reg, clr, set); in mtk_pdma_rmw()
194 static void mtk_gdma_write(struct mtk_eth_priv *priv, int no, u32 reg, in mtk_gdma_write() argument
[all …]
H A Dethoc.c201 static inline u32 *ethoc_reg(struct ethoc *priv, size_t offset) in ethoc_reg() argument
203 return priv->iobase + offset; in ethoc_reg()
206 static inline u32 ethoc_read(struct ethoc *priv, size_t offset) in ethoc_read() argument
208 return readl(ethoc_reg(priv, offset)); in ethoc_read()
211 static inline void ethoc_write(struct ethoc *priv, size_t offset, u32 data) in ethoc_write() argument
213 writel(data, ethoc_reg(priv, offset)); in ethoc_write()
216 static inline void ethoc_read_bd(struct ethoc *priv, int index, in ethoc_read_bd() argument
220 bd->stat = ethoc_read(priv, offset + 0); in ethoc_read_bd()
221 bd->addr = ethoc_read(priv, offset + 4); in ethoc_read_bd()
224 static inline void ethoc_write_bd(struct ethoc *priv, int index, in ethoc_write_bd() argument
[all …]
H A Dsni_ave.c102 #define AVE_DESC_SIZE(priv, num) \ argument
103 ((num) * ((priv)->data->is_desc_64bit ? AVE_DESC_SIZE_64 : \
163 int (*get_pinmode)(struct ave_private *priv);
166 static u32 ave_desc_read(struct ave_private *priv, enum desc_id id, int entry, in ave_desc_read() argument
172 if (priv->data->is_desc_64bit) { in ave_desc_read()
182 return readl(priv->iobase + addr); in ave_desc_read()
185 static u32 ave_desc_read_cmdsts(struct ave_private *priv, enum desc_id id, in ave_desc_read_cmdsts() argument
188 return ave_desc_read(priv, id, entry, AVE_DESC_OFS_CMDSTS); in ave_desc_read_cmdsts()
191 static void ave_desc_write(struct ave_private *priv, enum desc_id id, in ave_desc_write() argument
197 if (priv->data->is_desc_64bit) { in ave_desc_write()
[all …]
H A Dmt7628-eth.c155 static int mdio_wait_read(struct mt7628_eth_dev *priv, u32 mask, bool mask_set) in mdio_wait_read() argument
157 void __iomem *base = priv->eth_sw_base; in mdio_wait_read()
170 static int mii_mgr_read(struct mt7628_eth_dev *priv, in mii_mgr_read() argument
173 void __iomem *base = priv->eth_sw_base; in mii_mgr_read()
179 ret = mdio_wait_read(priv, PCR1_RD_RDY, false); in mii_mgr_read()
189 ret = mdio_wait_read(priv, PCR1_RD_RDY, true); in mii_mgr_read()
199 static int mii_mgr_write(struct mt7628_eth_dev *priv, in mii_mgr_write() argument
202 void __iomem *base = priv->eth_sw_base; in mii_mgr_write()
207 ret = mdio_wait_read(priv, PCR1_WT_DONE, false); in mii_mgr_write()
217 return mdio_wait_read(priv, PCR1_WT_DONE, true); in mii_mgr_write()
[all …]
H A Dtsec.c67 static void tsec_configure_serdes(struct tsec_private *priv) in tsec_configure_serdes() argument
73 tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), in tsec_configure_serdes()
75 tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), in tsec_configure_serdes()
77 tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), in tsec_configure_serdes()
131 struct tsec_private *priv = (struct tsec_private *)dev->priv; in tsec_mcast_addr() local
132 struct tsec __iomem *regs = priv->regs; in tsec_mcast_addr()
200 static void adjust_link(struct tsec_private *priv, struct phy_device *phydev) in adjust_link() argument
202 struct tsec __iomem *regs = priv->regs; in adjust_link()
260 struct tsec_private *priv = (struct tsec_private *)dev->priv; in tsec_send() local
261 struct tsec __iomem *regs = priv->regs; in tsec_send()
[all …]
/openbmc/u-boot/drivers/video/
H A Dvidconsole-uclass.c71 struct vidconsole_priv *priv = dev_get_uclass_priv(dev); in vidconsole_back() local
81 priv->xcur_frac -= VID_TO_POS(priv->x_charsize); in vidconsole_back()
82 if (priv->xcur_frac < priv->xstart_frac) { in vidconsole_back()
83 priv->xcur_frac = (priv->cols - 1) * in vidconsole_back()
84 VID_TO_POS(priv->x_charsize); in vidconsole_back()
85 priv->ycur -= priv->y_charsize; in vidconsole_back()
86 if (priv->ycur < 0) in vidconsole_back()
87 priv->ycur = 0; in vidconsole_back()
97 struct vidconsole_priv *priv = dev_get_uclass_priv(dev); in vidconsole_newline() local
103 priv->xcur_frac = priv->xstart_frac; in vidconsole_newline()
[all …]
H A Dpwm_backlight.c51 static int set_pwm(struct pwm_backlight_priv *priv) in set_pwm() argument
56 duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) / in set_pwm()
57 (priv->max_level - priv->min_level + 1); in set_pwm()
58 ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, in set_pwm()
66 struct pwm_backlight_priv *priv = dev_get_priv(dev); in enable_sequence() local
71 if (priv->reg) { in enable_sequence()
75 plat = dev_get_uclass_platdata(priv->reg); in enable_sequence()
77 dev->name, priv->reg->name, plat->name); in enable_sequence()
78 ret = regulator_set_enable(priv->reg, true); in enable_sequence()
89 dm_gpio_set_value(&priv->enable, 1); in enable_sequence()
[all …]
H A Dtda19988.c254 static void tda19988_register_set(struct tda19988_priv *priv, u16 reg, u8 val) in tda19988_register_set() argument
258 if (priv->current_page != page) { in tda19988_register_set()
259 dm_i2c_reg_write(priv->chip, REG_CURRENT_PAGE, page); in tda19988_register_set()
260 priv->current_page = page; in tda19988_register_set()
262 old_val = dm_i2c_reg_read(priv->chip, REG2ADDR(reg)); in tda19988_register_set()
264 dm_i2c_reg_write(priv->chip, REG2ADDR(reg), old_val); in tda19988_register_set()
267 static void tda19988_register_clear(struct tda19988_priv *priv, u16 reg, u8 val) in tda19988_register_clear() argument
271 if (priv->current_page != page) { in tda19988_register_clear()
272 dm_i2c_reg_write(priv->chip, REG_CURRENT_PAGE, page); in tda19988_register_clear()
273 priv->current_page = page; in tda19988_register_clear()
[all …]
/openbmc/u-boot/drivers/video/exynos/
H A Dexynos_fb.c102 static void exynos_fimd_set_dualrgb(struct exynos_fb_priv *priv, bool enabled) in exynos_fimd_set_dualrgb() argument
104 struct exynos_fb *reg = priv->reg; in exynos_fimd_set_dualrgb()
112 cfg |= EXYNOS_DUALRGB_SUB_CNT(priv->vl_col / 2) | in exynos_fimd_set_dualrgb()
119 static void exynos_fimd_set_dp_clkcon(struct exynos_fb_priv *priv, in exynos_fimd_set_dp_clkcon() argument
122 struct exynos_fb *reg = priv->reg; in exynos_fimd_set_dp_clkcon()
131 static void exynos_fimd_set_par(struct exynos_fb_priv *priv, in exynos_fimd_set_par() argument
134 struct exynos_fb *reg = priv->reg; in exynos_fimd_set_par()
154 switch (priv->vl_bpix) { in exynos_fimd_set_par()
171 cfg = EXYNOS_VIDOSD_RIGHT_X(priv->vl_col - 1) | in exynos_fimd_set_par()
172 EXYNOS_VIDOSD_BOTTOM_Y(priv->vl_row - 1) | in exynos_fimd_set_par()
[all …]
/openbmc/u-boot/arch/sandbox/cpu/
H A Deth-raw-os.c60 int sandbox_eth_raw_os_idx_to_name(struct eth_sandbox_raw_priv *priv) in sandbox_eth_raw_os_idx_to_name() argument
62 if (!if_indextoname(priv->host_ifindex, priv->host_ifname)) in sandbox_eth_raw_os_idx_to_name()
67 static int _raw_packet_start(struct eth_sandbox_raw_priv *priv, in _raw_packet_start() argument
76 priv->local_bind_sd = -1; in _raw_packet_start()
77 priv->device = os_malloc(sizeof(struct sockaddr_ll)); in _raw_packet_start()
78 if (priv->device == NULL) in _raw_packet_start()
80 device = priv->device; in _raw_packet_start()
82 device->sll_ifindex = if_nametoindex(priv->host_ifname); in _raw_packet_start()
83 priv->host_ifindex = device->sll_ifindex; in _raw_packet_start()
89 priv->sd = socket(PF_PACKET, SOCK_RAW, htons(ETH_P_ALL)); in _raw_packet_start()
[all …]
/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vpu_init.c22 void meson_vpp_setup_mux(struct meson_vpu_priv *priv, unsigned int mux) in meson_vpp_setup_mux() argument
24 writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL)); in meson_vpp_setup_mux()
39 static void meson_vpp_write_scaling_filter_coefs(struct meson_vpu_priv *priv, in meson_vpp_write_scaling_filter_coefs() argument
46 priv->io_base + _REG(VPP_OSD_SCALE_COEF_IDX)); in meson_vpp_write_scaling_filter_coefs()
49 priv->io_base + _REG(VPP_OSD_SCALE_COEF)); in meson_vpp_write_scaling_filter_coefs()
64 static void meson_vpp_write_vd_scaling_filter_coefs(struct meson_vpu_priv *priv, in meson_vpp_write_vd_scaling_filter_coefs() argument
71 priv->io_base + _REG(VPP_SCALE_COEF_IDX)); in meson_vpp_write_vd_scaling_filter_coefs()
74 priv->io_base + _REG(VPP_SCALE_COEF)); in meson_vpp_write_vd_scaling_filter_coefs()
115 static void meson_viu_set_osd_matrix(struct meson_vpu_priv *priv, in meson_viu_set_osd_matrix() argument
122 priv->io_base + _REG(VIU_OSD1_MATRIX_PRE_OFFSET0_1)); in meson_viu_set_osd_matrix()
[all …]
/openbmc/u-boot/drivers/net/ti/
H A Dcpsw.c211 #define for_active_slave(slave, priv) \ argument
212 slave = (priv)->slaves + (priv)->data.active_slave; if (slave)
213 #define for_each_slave(slave, priv) \ argument
214 for (slave = (priv)->slaves; slave != (priv)->slaves + \
215 (priv)->data.slaves; slave++)
301 static int cpsw_ale_read(struct cpsw_priv *priv, int idx, u32 *ale_entry) in cpsw_ale_read() argument
305 __raw_writel(idx, priv->ale_regs + ALE_TABLE_CONTROL); in cpsw_ale_read()
308 ale_entry[i] = __raw_readl(priv->ale_regs + ALE_TABLE + 4 * i); in cpsw_ale_read()
313 static int cpsw_ale_write(struct cpsw_priv *priv, int idx, u32 *ale_entry) in cpsw_ale_write() argument
318 __raw_writel(ale_entry[i], priv->ale_regs + ALE_TABLE + 4 * i); in cpsw_ale_write()
[all …]
/openbmc/u-boot/drivers/sound/
H A Dmax98090.c28 int max98090_hw_params(struct maxim_priv *priv, unsigned int rate, in max98090_hw_params() argument
36 maxim_i2c_read(priv, M98090_REG_INTERFACE_FORMAT, &value); in max98090_hw_params()
37 error = maxim_bic_or(priv, M98090_REG_INTERFACE_FORMAT, in max98090_hw_params()
39 maxim_i2c_read(priv, M98090_REG_INTERFACE_FORMAT, &value); in max98090_hw_params()
49 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG, in max98090_hw_params()
52 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG, in max98090_hw_params()
57 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG, in max98090_hw_params()
60 error |= maxim_bic_or(priv, M98090_REG_FILTER_CONFIG, in max98090_hw_params()
67 priv->rate = rate; in max98090_hw_params()
80 int max98090_set_sysclk(struct maxim_priv *priv, unsigned int freq) in max98090_set_sysclk() argument
[all …]
H A Dmax98088.c58 int max98088_hw_params(struct maxim_priv *priv, unsigned int rate, in max98088_hw_params() argument
66 error = maxim_bic_or(priv, M98088_REG_DAI1_FORMAT, in max98088_hw_params()
70 error = maxim_bic_or(priv, M98088_REG_DAI1_FORMAT, in max98088_hw_params()
79 error |= maxim_bic_or(priv, M98088_REG_PWR_SYS, M98088_SHDNRUN, 0); in max98088_hw_params()
87 error |= maxim_bic_or(priv, M98088_REG_DAI1_CLKMODE, in max98088_hw_params()
89 priv->rate = rate; in max98088_hw_params()
93 error |= maxim_bic_or(priv, M98088_REG_DAI1_FILTERS, in max98088_hw_params()
96 error |= maxim_bic_or(priv, M98088_REG_DAI1_FILTERS, in max98088_hw_params()
99 error |= maxim_bic_or(priv, M98088_REG_PWR_SYS, M98088_SHDNRUN, in max98088_hw_params()
106 priv->rate = rate; in max98088_hw_params()
[all …]
/openbmc/u-boot/drivers/mmc/
H A Dtmio-common.c24 static u64 tmio_sd_readq(struct tmio_sd_priv *priv, unsigned int reg) in tmio_sd_readq() argument
26 return readq(priv->regbase + (reg << 1)); in tmio_sd_readq()
29 static void tmio_sd_writeq(struct tmio_sd_priv *priv, in tmio_sd_writeq() argument
32 writeq(val, priv->regbase + (reg << 1)); in tmio_sd_writeq()
35 static u16 tmio_sd_readw(struct tmio_sd_priv *priv, unsigned int reg) in tmio_sd_readw() argument
37 return readw(priv->regbase + (reg >> 1)); in tmio_sd_readw()
40 static void tmio_sd_writew(struct tmio_sd_priv *priv, in tmio_sd_writew() argument
43 writew(val, priv->regbase + (reg >> 1)); in tmio_sd_writew()
46 u32 tmio_sd_readl(struct tmio_sd_priv *priv, unsigned int reg) in tmio_sd_readl() argument
50 if (priv->caps & TMIO_SD_CAP_64BIT) in tmio_sd_readl()
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