| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| H A D | dcn302_hwseq.c | 58 DOMAIN1_POWER_GATE, power_gate); in dcn302_dpp_pg_control()
66 DOMAIN3_POWER_GATE, power_gate); in dcn302_dpp_pg_control()
74 DOMAIN5_POWER_GATE, power_gate); in dcn302_dpp_pg_control()
82 DOMAIN7_POWER_GATE, power_gate); in dcn302_dpp_pg_control()
90 DOMAIN9_POWER_GATE, power_gate); in dcn302_dpp_pg_control()
115 DOMAIN0_POWER_GATE, power_gate); in dcn302_hubp_pg_control()
123 DOMAIN2_POWER_GATE, power_gate); in dcn302_hubp_pg_control()
131 DOMAIN4_POWER_GATE, power_gate); in dcn302_hubp_pg_control()
139 DOMAIN6_POWER_GATE, power_gate); in dcn302_hubp_pg_control()
147 DOMAIN8_POWER_GATE, power_gate); in dcn302_hubp_pg_control()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hwseq.c | 282 uint32_t power_gate = power_on ? 0 : 1; in dcn31_dsc_pg_control() local
302 DOMAIN_POWER_GATE, power_gate); in dcn31_dsc_pg_control()
310 DOMAIN_POWER_GATE, power_gate); in dcn31_dsc_pg_control()
318 DOMAIN_POWER_GATE, power_gate); in dcn31_dsc_pg_control()
441 uint32_t power_gate = power_on ? 0 : 1; in dcn31_hubp_pg_control() local
455 REG_SET(DOMAIN0_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn31_hubp_pg_control()
459 REG_SET(DOMAIN1_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn31_hubp_pg_control()
463 REG_SET(DOMAIN2_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn31_hubp_pg_control()
467 REG_SET(DOMAIN3_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn31_hubp_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_hwseq.c | 242 uint32_t power_gate = power_on ? 0 : 1; in dcn314_dsc_pg_control() local
262 DOMAIN_POWER_GATE, power_gate); in dcn314_dsc_pg_control()
270 DOMAIN_POWER_GATE, power_gate); in dcn314_dsc_pg_control()
278 DOMAIN_POWER_GATE, power_gate); in dcn314_dsc_pg_control()
286 DOMAIN_POWER_GATE, power_gate); in dcn314_dsc_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.c | 377 DOMAIN16_POWER_GATE, power_gate); in dcn20_dsc_pg_control()
448 DOMAIN1_POWER_GATE, power_gate); in dcn20_dpp_pg_control()
456 DOMAIN3_POWER_GATE, power_gate); in dcn20_dpp_pg_control()
464 DOMAIN5_POWER_GATE, power_gate); in dcn20_dpp_pg_control()
472 DOMAIN7_POWER_GATE, power_gate); in dcn20_dpp_pg_control()
480 DOMAIN9_POWER_GATE, power_gate); in dcn20_dpp_pg_control()
522 DOMAIN0_POWER_GATE, power_gate); in dcn20_hubp_pg_control()
530 DOMAIN2_POWER_GATE, power_gate); in dcn20_hubp_pg_control()
538 DOMAIN4_POWER_GATE, power_gate); in dcn20_hubp_pg_control()
546 DOMAIN6_POWER_GATE, power_gate); in dcn20_hubp_pg_control()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/ |
| H A D | amdgpu_smu.c | 223 struct smu_power_gate *power_gate = &smu_power->power_gate; in smu_dpm_set_vcn_enable() local
229 if (atomic_read(&power_gate->vcn_gated) ^ enable) in smu_dpm_set_vcn_enable()
234 atomic_set(&power_gate->vcn_gated, !enable); in smu_dpm_set_vcn_enable()
243 struct smu_power_gate *power_gate = &smu_power->power_gate; in smu_dpm_set_jpeg_enable() local
249 if (atomic_read(&power_gate->jpeg_gated) ^ enable) in smu_dpm_set_jpeg_enable()
254 atomic_set(&power_gate->jpeg_gated, !enable); in smu_dpm_set_jpeg_enable()
679 struct smu_power_gate *power_gate = &smu_power->power_gate; in smu_set_default_dpm_table() local
686 vcn_gate = atomic_read(&power_gate->vcn_gated); in smu_set_default_dpm_table()
687 jpeg_gate = atomic_read(&power_gate->jpeg_gated); in smu_set_default_dpm_table()
1121 atomic_set(&smu->smu_power.power_gate.vcn_gated, 1); in smu_sw_init()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_hwseq.c | 73 uint32_t power_gate = power_on ? 0 : 1; in dcn32_dsc_pg_control() local
90 DOMAIN_POWER_GATE, power_gate); in dcn32_dsc_pg_control()
98 DOMAIN_POWER_GATE, power_gate); in dcn32_dsc_pg_control()
106 DOMAIN_POWER_GATE, power_gate); in dcn32_dsc_pg_control()
114 DOMAIN_POWER_GATE, power_gate); in dcn32_dsc_pg_control()
162 uint32_t power_gate = power_on ? 0 : 1; in dcn32_hubp_pg_control() local
173 REG_SET(DOMAIN0_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn32_hubp_pg_control()
177 REG_SET(DOMAIN1_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn32_hubp_pg_control()
181 REG_SET(DOMAIN2_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn32_hubp_pg_control()
185 REG_SET(DOMAIN3_PG_CONFIG, 0, DOMAIN_POWER_GATE, power_gate); in dcn32_hubp_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer.c | 622 uint32_t power_gate = power_on ? 0 : 1; in dcn10_dpp_pg_control() local
633 DOMAIN1_POWER_GATE, power_gate); in dcn10_dpp_pg_control()
641 DOMAIN3_POWER_GATE, power_gate); in dcn10_dpp_pg_control()
649 DOMAIN5_POWER_GATE, power_gate); in dcn10_dpp_pg_control()
657 DOMAIN7_POWER_GATE, power_gate); in dcn10_dpp_pg_control()
683 uint32_t power_gate = power_on ? 0 : 1; in dcn10_hubp_pg_control() local
694 DOMAIN0_POWER_GATE, power_gate); in dcn10_hubp_pg_control()
702 DOMAIN2_POWER_GATE, power_gate); in dcn10_hubp_pg_control()
710 DOMAIN4_POWER_GATE, power_gate); in dcn10_hubp_pg_control()
718 DOMAIN6_POWER_GATE, power_gate); in dcn10_hubp_pg_control()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| H A D | amdgpu_smu.h | 382 struct smu_power_gate power_gate; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 1513 uint8_t power_gate : 1; /**< 1=power gate, 0=power up */ member
|