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Searched refs:pin (Results 1 – 25 of 2771) sorted by relevance

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/openbmc/linux/drivers/media/cec/core/
H A Dcec-pin.c329 pin->rx_bit = pin->tx_bit = 0; in cec_pin_to_idle()
480 if (pin->tx_bit / 10 >= pin->tx_msg.len + pin->tx_extra_bytes) { in cec_pin_tx_states()
581 pin->rx_bit = pin->tx_bit; in cec_pin_tx_states()
818 pin->work_rx_msg = pin->rx_msg; in cec_pin_rx_states()
1035 struct cec_pin *pin = adap->pin; in cec_pin_thread_func() local
1133 struct cec_pin *pin = adap->pin; in cec_pin_adap_enable() local
1168 struct cec_pin *pin = adap->pin; in cec_pin_adap_log_addr() local
1189 struct cec_pin *pin = adap->pin; in cec_pin_adap_transmit() local
1220 struct cec_pin *pin = adap->pin; in cec_pin_adap_status() local
1286 struct cec_pin *pin = adap->pin; in cec_pin_adap_monitor_all_enable() local
[all …]
/openbmc/u-boot/board/sunxi/
H A Dgmac.c37 for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) {
39 for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
51 for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++) {
55 for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) {
59 for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(20); pin++) {
69 for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(27); pin++) {
75 for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(3); pin++)
77 for (pin = SUNXI_GPA(8); pin <= SUNXI_GPA(9); pin++)
79 for (pin = SUNXI_GPA(11); pin <= SUNXI_GPA(14); pin++)
81 for (pin = SUNXI_GPA(19); pin <= SUNXI_GPA(24); pin++)
[all …]
H A Dboard.c336 for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(19); pin++) in nand_pinmux_setup()
340 for (pin = SUNXI_GPC(20); pin <= SUNXI_GPC(22); pin++) in nand_pinmux_setup()
382 for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { in mmc_pinmux_setup()
403 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { in mmc_pinmux_setup()
411 for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) { in mmc_pinmux_setup()
418 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { in mmc_pinmux_setup()
426 for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) { in mmc_pinmux_setup()
433 for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { in mmc_pinmux_setup()
447 for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { in mmc_pinmux_setup()
501 for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) { in mmc_pinmux_setup()
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dkw_gpio.c30 u |= 1 << (pin & 31); in __set_direction()
32 u &= ~(1 << (pin & 31)); in __set_direction()
42 u = readl(GPIO_OUT(pin)); in __set_level()
44 u |= 1 << (pin & 31); in __set_level()
46 u &= ~(1 << (pin & 31)); in __set_level()
47 writel(u, GPIO_OUT(pin)); in __set_level()
56 u |= 1 << (pin & 31); in __set_blinking()
64 if (pin < GPIO_MAX) { in kw_gpio_is_valid()
128 if (readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31))) in kw_gpio_get_value()
129 val = readl(GPIO_DATA_IN(pin)) ^ readl(GPIO_IN_POL(pin)); in kw_gpio_get_value()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsama5d3_lcd.dtsi42 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
43 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
44 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
45 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
46 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
47 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
48 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
49 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
50 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
51 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
H A Dat91sam9x5_lcd.dtsi42 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
43 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
44 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
45 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
46 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
47 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
48 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
49 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
50 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
51 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3_lcd.dtsi60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
H A Dat91sam9x5_lcd.dtsi63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpinctrl-rza1.c82 u8 pin: 4; member
99 u16 pin: 4; member
126 { .pin = 0, .func = 1 },
127 { .pin = 1, .func = 1 },
128 { .pin = 2, .func = 1 },
129 { .pin = 3, .func = 1 },
130 { .pin = 4, .func = 1 },
446 u8 pin; member
513 if (bidir_pin->pin == pin && bidir_pin->func == func) in rza1_pinmux_get_bidir()
531 if (swio_pin->port == port && swio_pin->pin == pin && in rza1_pinmux_get_swio()
[all …]
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynosautov9-pinctrl.dtsi3 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source
7 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as
42 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
47 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
61 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
67 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
107 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
113 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
119 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
221 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos7885-pinctrl.dtsi3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as
85 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
91 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
98 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
106 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
267 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
689 samsung,pin-val = <1>;
709 samsung,pin-val = <1>;
[all …]
H A Dexynos5433-pinctrl.dtsi3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
15 pin- ## _pin { \
195 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
202 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
287 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
294 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
301 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
322 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
329 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos7-pinctrl.dtsi3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV1>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
253 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
260 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos850-pinctrl.dtsi3 * Samsung's Exynos850 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos850 SoC pin-mux and pin-config options are listed as device
109 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
125 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
132 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
221 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
363 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
370 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210-pinctrl.dtsi11 * Samsung's S5PV210 SoC pin banks, pin-mux and pin-config options are
18 pin- ## _pin { \
281 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
288 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
295 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
302 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
309 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
316 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
323 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
330 samsung,pin-drv = <S5PV210_PIN_DRV_LV1>;
[all …]
H A Dexynos4x12-pinctrl.dtsi3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device
15 pin- ## _pin { \
130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
144 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
151 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
157 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
185 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
206 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos4210-pinctrl.dtsi3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device
149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
163 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
170 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
176 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
225 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
232 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos5420-pinctrl.dtsi3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
177 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
184 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
226 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
233 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos5250-pinctrl.dtsi3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config options are listed as device
204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
224 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
251 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
258 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
272 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
279 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Dexynos3250-pinctrl.dtsi3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device
15 pin- ## _pin { \
23 pin- ## _pin { \
90 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
97 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
104 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
117 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
131 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
138 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Ds3c64xx-pinctrl.dtsi4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
203 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
210 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
216 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
228 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
264 samsung,pin-pud = <S3C64XX_PIN_PULL_UP>;
[all …]
H A Dexynos5260-pinctrl.dtsi3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
237 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
244 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
281 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
288 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
295 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
302 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
309 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
316 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
/openbmc/u-boot/arch/arm/mach-kirkwood/include/mach/
H A Dgpio.h18 #define GPIO_OFF(pin) (((pin) >> 5) ? 0x0040 : 0x0000) argument
19 #define GPIO_OUT(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00) argument
20 #define GPIO_IO_CONF(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x04) argument
21 #define GPIO_BLINK_EN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x08) argument
22 #define GPIO_IN_POL(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x0c) argument
23 #define GPIO_DATA_IN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x10) argument
24 #define GPIO_EDGE_CAUSE(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x14) argument
25 #define GPIO_EDGE_MASK(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x18) argument
26 #define GPIO_LEVEL_MASK(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x1c) argument
36 int kw_gpio_get_value(unsigned pin);
[all …]
/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-ssbi-mpp.c177 if (pin->dtest) { in pm8xxx_mpp_update()
180 } else if (pin->input && pin->output) { in pm8xxx_mpp_update()
182 if (pin->high_z) in pm8xxx_mpp_update()
192 if (pin->dtest) in pm8xxx_mpp_update()
199 if (pin->paired) in pm8xxx_mpp_update()
210 if (pin->paired) in pm8xxx_mpp_update()
220 if (pin->dtest) { in pm8xxx_mpp_update()
226 if (pin->paired) in pm8xxx_mpp_update()
352 arg = pin->amux; in pm8xxx_pin_config_get()
499 if (!pin->input) in pm8xxx_mpp_get()
[all …]
/openbmc/linux/drivers/pinctrl/aspeed/
H A Dpinmux-aspeed.h652 #define PIN_EXPRS_SYM(pin) pin_exprs_ ## pin argument
653 #define PIN_EXPRS_PTR(pin) (&PIN_EXPRS_SYM(pin)[0]) argument
654 #define PIN_SYM(pin) pin_ ## pin argument
660 { #pin, PIN_EXPRS_PTR(pin) }
677 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \
695 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \
697 FUNC_GROUP_DECL(sig, pin)
719 PIN_DECL_(pin, \
726 PIN_DECL_(pin, \
734 PIN_DECL_(pin, \
[all …]

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