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Searched refs:pdc_write (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gmu.c573 pdc_write(seqptr, REG_A6XX_PDC_GPU_SEQ_MEM_0, 0xfebea1e1); in a6xx_gmu_rpmh_init()
580 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK, 7); in a6xx_gmu_rpmh_init()
582 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CONTROL, 0); in a6xx_gmu_rpmh_init()
584 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR, 0x30010); in a6xx_gmu_rpmh_init()
585 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_DATA, 1); in a6xx_gmu_rpmh_init()
588 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_DATA + 4, 0x0); in a6xx_gmu_rpmh_init()
592 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_DATA + 8, 0x0); in a6xx_gmu_rpmh_init()
596 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CONTROL, 0); in a6xx_gmu_rpmh_init()
599 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_DATA, 2); in a6xx_gmu_rpmh_init()
614 pdc_write(pdcptr, REG_A6XX_PDC_GPU_SEQ_START_ADDR, 0); in a6xx_gmu_rpmh_init()
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-imgpdc.c89 static void pdc_write(struct pdc_intc_priv *priv, unsigned int reg_offs, in pdc_write() function
137 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in perip_irq_mask()
147 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in perip_irq_unmask()
186 pdc_write(priv, soc_sys_wake_regoff, soc_sys_wake); in syswake_irq_set_type()
209 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in pdc_irq_set_wake()
274 pdc_write(priv, PDC_IRQ_ENABLE, 0); in pdc_intc_setup()
282 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in pdc_intc_setup()
290 pdc_write(priv, soc_sys_wake_regoff, soc_sys_wake); in pdc_intc_setup()