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Searched refs:pd_reg (Results 1 – 25 of 27) sorted by relevance

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/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.c119 val = readl(priv->base + pll->pd_reg); in mtk_pll_set_rate_regs()
124 if (pll->pd_reg != pll->pcw_reg) { in mtk_pll_set_rate_regs()
125 writel(val, priv->base + pll->pd_reg); in mtk_pll_set_rate_regs()
191 postdiv = (readl(priv->base + pll->pd_reg) >> pll->pd_shift) & in mtk_apmixedsys_get_rate()
H A Dclk-mtk.h34 u32 pd_reg; member
H A Dclk-mt7629.c41 .pd_reg = _pd_reg, \
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8195-apusys_pll.c40 .pd_reg = _pd_reg, \
H A Dclk-mt7986-apmixed.c30 .pcwbits = _pcwbits, .pd_reg = _pd_reg, .pd_shift = _pd_shift, \
H A Dclk-mt8135-apmixedsys.c30 .pd_reg = _pd_reg, \
H A Dclk-mt7981-apmixed.c32 .pcwbits = _pcwbits, .pd_reg = _pd_reg, .pd_shift = _pd_shift, \
H A Dclk-pll.h32 u32 pd_reg; member
H A Dclk-mt8516-apmixedsys.c35 .pd_reg = _pd_reg, \
H A Dclk-mt8167-apmixedsys.c34 .pd_reg = _pd_reg, \
H A Dclk-mt8188-apmixedsys.c48 .pd_reg = _pd_reg, \
H A Dclk-mt7622-apmixedsys.c32 .pd_reg = _pd_reg, \
H A Dclk-mt2712-apmixedsys.c34 .pd_reg = _pd_reg, \
H A Dclk-mt8365-apmixedsys.c34 .pd_reg = _pd_reg, \
H A Dclk-mt8186-apmixedsys.c34 .pd_reg = _pd_reg, \
H A Dclk-mt8183-apmixedsys.c70 .pd_reg = _pd_reg, \
H A Dclk-mt8192-apmixedsys.c51 .pd_reg = _pd_reg, \
H A Dclk-mt8173-apmixedsys.c36 .pd_reg = _pd_reg, \
H A Dclk-mt6795-apmixedsys.c37 .pd_reg = _pd_reg, \
H A Dclk-mt8195-apmixedsys.c49 .pd_reg = _pd_reg, \
H A Dclk-mt7629.c35 .pd_reg = _pd_reg, \
H A Dclk-mt6797.c611 .pd_reg = _pd_reg, \
H A Dclk-pll.c296 pll->pd_addr = base + data->pd_reg; in mtk_clk_register_pll_ops()
H A Dclk-mt6779.c1161 .pd_reg = _pd_reg, \
H A Dclk-mt6765.c685 .pd_reg = _pd_reg, \

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