/openbmc/linux/drivers/net/ethernet/intel/i40e/ |
H A D | i40e_hmc.c | 114 u64 *pd_addr; in i40e_add_pd_table_entry() local 151 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40e_add_pd_table_entry() 152 pd_addr += rel_pd_idx; in i40e_add_pd_table_entry() 155 memcpy(pd_addr, &page_desc, sizeof(u64)); in i40e_add_pd_table_entry() 190 u64 *pd_addr; in i40e_remove_pd_bp() local 216 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40e_remove_pd_bp() 217 pd_addr += rel_pd_idx; in i40e_remove_pd_bp() 218 memset(pd_addr, 0, sizeof(u64)); in i40e_remove_pd_bp()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | vcn_sw_ring.c | 66 uint32_t vmid, uint64_t pd_addr) in vcn_dec_sw_ring_emit_vm_flush() argument 71 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_dec_sw_ring_emit_vm_flush() 75 data1 = lower_32_bits(pd_addr); in vcn_dec_sw_ring_emit_vm_flush()
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H A D | vcn_v2_0.h | 37 unsigned vmid, uint64_t pd_addr); 50 unsigned int vmid, uint64_t pd_addr);
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H A D | amdgpu_trace.h | 228 __field(u64, pd_addr) 237 __entry->pd_addr = job->vm_pd_addr; 242 __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) 418 uint64_t pd_addr), 419 TP_ARGS(ring, vmid, pd_addr), 424 __field(u64, pd_addr) 431 __entry->pd_addr = pd_addr; 435 __entry->vm_hub, __entry->pd_addr)
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H A D | vcn_sw_ring.h | 40 uint32_t vmid, uint64_t pd_addr);
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H A D | jpeg_v2_0.h | 57 unsigned vmid, uint64_t pd_addr);
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H A D | amdgpu_gmc.c | 129 uint64_t pd_addr; in amdgpu_gmc_pd_addr() local 135 amdgpu_gmc_get_pde_for_bo(bo, -1, &pd_addr, &flags); in amdgpu_gmc_pd_addr() 136 pd_addr |= flags; in amdgpu_gmc_pd_addr() 138 pd_addr = amdgpu_bo_gpu_offset(bo); in amdgpu_gmc_pd_addr() 140 return pd_addr; in amdgpu_gmc_pd_addr()
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H A D | jpeg_v2_0.c | 616 unsigned vmid, uint64_t pd_addr) in jpeg_v2_0_dec_ring_emit_vm_flush() argument 621 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v2_0_dec_ring_emit_vm_flush() 625 data1 = lower_32_bits(pd_addr); in jpeg_v2_0_dec_ring_emit_vm_flush()
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H A D | jpeg_v1_0.c | 384 unsigned vmid, uint64_t pd_addr) in jpeg_v1_0_decode_ring_emit_vm_flush() argument 389 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v1_0_decode_ring_emit_vm_flush() 393 data1 = lower_32_bits(pd_addr); in jpeg_v1_0_decode_ring_emit_vm_flush()
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H A D | gmc_v11_0.c | 382 unsigned int vmid, uint64_t pd_addr) in gmc_v11_0_emit_flush_gpu_tlb() argument 405 lower_32_bits(pd_addr)); in gmc_v11_0_emit_flush_gpu_tlb() 409 upper_32_bits(pd_addr)); in gmc_v11_0_emit_flush_gpu_tlb() 426 return pd_addr; in gmc_v11_0_emit_flush_gpu_tlb()
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H A D | uvd_v7_0.c | 1400 unsigned vmid, uint64_t pd_addr) in uvd_v7_0_ring_emit_vm_flush() argument 1405 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v7_0_ring_emit_vm_flush() 1409 data1 = lower_32_bits(pd_addr); in uvd_v7_0_ring_emit_vm_flush() 1443 unsigned int vmid, uint64_t pd_addr) in uvd_v7_0_enc_ring_emit_vm_flush() argument 1447 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in uvd_v7_0_enc_ring_emit_vm_flush() 1452 lower_32_bits(pd_addr), 0xffffffff); in uvd_v7_0_enc_ring_emit_vm_flush()
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H A D | vcn_v2_0.c | 1512 unsigned vmid, uint64_t pd_addr) in vcn_v2_0_dec_ring_emit_vm_flush() argument 1517 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush() 1521 data1 = lower_32_bits(pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush() 1672 unsigned int vmid, uint64_t pd_addr) in vcn_v2_0_enc_ring_emit_vm_flush() argument 1676 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_enc_ring_emit_vm_flush() 1681 lower_32_bits(pd_addr), 0xffffffff); in vcn_v2_0_enc_ring_emit_vm_flush()
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H A D | vcn_v1_0.c | 1551 unsigned vmid, uint64_t pd_addr) in vcn_v1_0_dec_ring_emit_vm_flush() argument 1556 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v1_0_dec_ring_emit_vm_flush() 1560 data1 = lower_32_bits(pd_addr); in vcn_v1_0_dec_ring_emit_vm_flush() 1696 unsigned int vmid, uint64_t pd_addr) in vcn_v1_0_enc_ring_emit_vm_flush() argument 1700 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v1_0_enc_ring_emit_vm_flush() 1705 lower_32_bits(pd_addr), 0xffffffff); in vcn_v1_0_enc_ring_emit_vm_flush()
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/openbmc/qemu/target/i386/ |
H A D | monitor.c | 104 uint64_t pdp_addr, pd_addr, pt_addr; in tlb_info_pae32() local 111 pd_addr = pdpe & 0x3fffffffff000ULL; in tlb_info_pae32() 113 cpu_physical_memory_read(pd_addr + l2 * 8, &pde, 8); in tlb_info_pae32() 145 uint64_t pdp_addr, pd_addr, pt_addr; in tlb_info_la48() local 169 pd_addr = pdpe & 0x3fffffffff000ULL; in tlb_info_la48() 171 cpu_physical_memory_read(pd_addr + l3 * 8, &pde, 8); in tlb_info_la48() 321 uint64_t pdp_addr, pd_addr, pt_addr; in mem_info_pae32() local 332 pd_addr = pdpe & 0x3fffffffff000ULL; in mem_info_pae32() 378 uint64_t pml4_addr, pdp_addr, pd_addr, pt_addr, start, end; in mem_info_la48() local 400 pd_addr = pdpe & 0x3fffffffff000ULL; in mem_info_la48() [all …]
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/openbmc/linux/drivers/gpu/drm/radeon/ |
H A D | radeon_trace.h | 108 TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id), 109 TP_ARGS(pd_addr, ring, id), 111 __field(u64, pd_addr) 117 __entry->pd_addr = pd_addr; 122 __entry->pd_addr, __entry->ring, __entry->id)
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H A D | si_dma.c | 187 unsigned vm_id, uint64_t pd_addr) in si_dma_vm_flush() argument 196 radeon_ring_write(ring, pd_addr >> 12); in si_dma_vm_flush()
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H A D | radeon_vm.c | 241 uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); in radeon_vm_flush() local 244 if (pd_addr != vm_id->pd_gpu_addr || !vm_id->flushed_updates || in radeon_vm_flush() 247 trace_radeon_vm_flush(pd_addr, ring, vm->ids[ring].id); in radeon_vm_flush() 250 vm_id->pd_gpu_addr = pd_addr; in radeon_vm_flush() 644 uint64_t pd_addr = radeon_bo_gpu_offset(pd); in radeon_vm_update_page_directory() local 679 pde = pd_addr + pt_idx * 8; in radeon_vm_update_page_directory()
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H A D | ni_dma.c | 449 unsigned vm_id, uint64_t pd_addr) in cayman_dma_vm_flush() argument 453 radeon_ring_write(ring, pd_addr >> 12); in cayman_dma_vm_flush()
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H A D | radeon_asic.h | 614 unsigned vm_id, uint64_t pd_addr); 640 unsigned vm_id, uint64_t pd_addr); 722 unsigned vm_id, uint64_t pd_addr); 745 unsigned vm_id, uint64_t pd_addr); 829 unsigned vm_id, uint64_t pd_addr); 848 unsigned vm_id, uint64_t pd_addr);
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/openbmc/linux/drivers/infiniband/hw/irdma/ |
H A D | hmc.c | 552 u64 *pd_addr; in irdma_add_pd_table_entry() local 586 pd_addr = pd_table->pd_page_addr.va; in irdma_add_pd_table_entry() 587 pd_addr += rel_pd_idx; in irdma_add_pd_table_entry() 588 memcpy(pd_addr, &page_desc, sizeof(*pd_addr)); in irdma_add_pd_table_entry() 622 u64 *pd_addr; in irdma_remove_pd_bp() local 640 pd_addr = pd_table->pd_page_addr.va; in irdma_remove_pd_bp() 641 pd_addr += rel_pd_idx; in irdma_remove_pd_bp() 642 memset(pd_addr, 0, sizeof(u64)); in irdma_remove_pd_bp()
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-pll.c | 102 val = readl(pll->pd_addr); in mtk_pll_set_rate_regs() 107 if (pll->pd_addr != pll->pcw_addr) { in mtk_pll_set_rate_regs() 108 writel(val, pll->pd_addr); in mtk_pll_set_rate_regs() 193 postdiv = (readl(pll->pd_addr) >> pll->data->pd_shift) & POSTDIV_MASK; in mtk_pll_recalc_rate() 296 pll->pd_addr = base + data->pd_reg; in mtk_clk_register_pll_ops()
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H A D | clk-fhctl.c | 165 regval = readl(pll->pd_addr) >> pll->data->pd_shift; in __get_postdiv() 175 regval = readl(pll->pd_addr); in __set_postdiv() 178 writel(regval, pll->pd_addr); in __set_postdiv()
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H A D | clk-pll.h | 63 void __iomem *pd_addr; member
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/openbmc/linux/drivers/gpu/drm/i915/gt/ |
H A D | gen6_ppgtt.h | 18 gen6_pte_t __iomem *pd_addr; member
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H A D | gen6_ppgtt.c | 27 ppgtt->pd_addr + pde); in gen6_write_pde() 165 ioread32(ppgtt->pd_addr + pde - 1); in gen6_flush_pd() 291 ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm + ggtt_offset; in pd_vma_bind()
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