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Searched refs:pcw_reg (Results 1 – 25 of 27) sorted by relevance

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/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.c124 if (pll->pd_reg != pll->pcw_reg) { in mtk_pll_set_rate_regs()
126 val = readl(priv->base + pll->pcw_reg); in mtk_pll_set_rate_regs()
133 writel(val, priv->base + pll->pcw_reg); in mtk_pll_set_rate_regs()
136 writel(val, priv->base + pll->pcw_reg); in mtk_pll_set_rate_regs()
195 pcw = readl(priv->base + pll->pcw_reg) >> pll->pcw_shift; in mtk_apmixedsys_get_rate()
H A Dclk-mtk.h40 u32 pcw_reg; member
H A Dclk-mt7629.c43 .pcw_reg = _pcw_reg, \
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8195-apusys_pll.c45 .pcw_reg = _pcw_reg, \
H A Dclk-mt7981-apmixed.c33 .tuner_reg = _tuner_reg, .pcw_reg = _pcw_reg, \
H A Dclk-mt8135-apmixedsys.c33 .pcw_reg = _pcw_reg, \
H A Dclk-mt7986-apmixed.c31 .tuner_reg = _tuner_reg, .pcw_reg = _pcw_reg, \
H A Dclk-pll.h44 u32 pcw_reg; member
H A Dclk-mt8516-apmixedsys.c38 .pcw_reg = _pcw_reg, \
H A Dclk-mt8167-apmixedsys.c37 .pcw_reg = _pcw_reg, \
H A Dclk-mt8188-apmixedsys.c53 .pcw_reg = _pcw_reg, \
H A Dclk-mt7622-apmixedsys.c35 .pcw_reg = _pcw_reg, \
H A Dclk-mt2712-apmixedsys.c39 .pcw_reg = _pcw_reg, \
H A Dclk-mt8365-apmixedsys.c39 .pcw_reg = _pcw_reg, \
H A Dclk-mt8186-apmixedsys.c39 .pcw_reg = _pcw_reg, \
H A Dclk-mt8183-apmixedsys.c75 .pcw_reg = _pcw_reg, \
H A Dclk-mt8173-apmixedsys.c39 .pcw_reg = _pcw_reg, \
H A Dclk-mt8195-apmixedsys.c54 .pcw_reg = _pcw_reg, \
H A Dclk-mt8192-apmixedsys.c56 .pcw_reg = _pcw_reg, \
H A Dclk-mt6795-apmixedsys.c40 .pcw_reg = _pcw_reg, \
H A Dclk-mt7629.c38 .pcw_reg = _pcw_reg, \
H A Dclk-pll.c297 pll->pcw_addr = base + data->pcw_reg; in mtk_clk_register_pll_ops()
H A Dclk-mt6797.c614 .pcw_reg = _pcw_reg, \
H A Dclk-mt6765.c690 .pcw_reg = _pcw_reg, \
H A Dclk-mt6779.c1166 .pcw_reg = _pcw_reg, \

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