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Searched refs:pcw_chg_reg (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8195-apusys_pll.c47 .pcw_chg_reg = 0, \
H A Dclk-pll.h46 u32 pcw_chg_reg; member
H A Dclk-mt8188-apmixedsys.c55 .pcw_chg_reg = _pcw_chg_reg, \
H A Dclk-mt8365-apmixedsys.c41 .pcw_chg_reg = _pcw_chg_reg, \
H A Dclk-pll.c298 if (data->pcw_chg_reg) in mtk_clk_register_pll_ops()
299 pll->pcw_chg_addr = base + data->pcw_chg_reg; in mtk_clk_register_pll_ops()
H A Dclk-mt8186-apmixedsys.c41 .pcw_chg_reg = 0, \
H A Dclk-mt8183-apmixedsys.c77 .pcw_chg_reg = _pcw_chg_reg, \
H A Dclk-mt8195-apmixedsys.c56 .pcw_chg_reg = _pcw_chg_reg, \
H A Dclk-mt8192-apmixedsys.c58 .pcw_chg_reg = _pcw_chg_reg, \
H A Dclk-mt6779.c1168 .pcw_chg_reg = _pcw_chg_reg, \