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Searched refs:pattern_table (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_bist.c31 struct pattern_info *pattern_table = ddr3_tip_get_pattern_table(); in ddr3_tip_bist_activate() local
48 pattern_table[pattern].tx_burst_size : 0; in ddr3_tip_bist_activate()
52 pattern_table[pattern].num_of_phases_tx, tx_burst_size, in ddr3_tip_bist_activate()
53 pattern_table[pattern].num_of_phases_rx, in ddr3_tip_bist_activate()
469 tx_burst_size = pattern_table[pattern].tx_burst_size; in mv_ddr_odpg_bist_prepare()
519 pattern_table[pattern].num_of_phases_tx, in mv_ddr_dm_vw_get()
520 pattern_table[pattern].tx_burst_size, in mv_ddr_dm_vw_get()
521 pattern_table[pattern].num_of_phases_rx, in mv_ddr_dm_vw_get()
552 pattern_table[pattern].num_of_phases_tx, in mv_ddr_dm_vw_get()
553 pattern_table[pattern].tx_burst_size, in mv_ddr_dm_vw_get()
[all …]
H A Dddr3_training_ip_engine.c400 pattern_table[pattern].start_addr); in ddr3_tip_ip_training()
402 pattern_table[pattern].tx_burst_size : 0; in ddr3_tip_ip_training()
407 pattern_table[pattern].num_of_phases_tx, tx_burst_size, in ddr3_tip_ip_training()
408 pattern_table[pattern].num_of_phases_rx, in ddr3_tip_ip_training()
580 pattern_length_cnt < pattern_table[pattern].pattern_len; in ddr3_tip_load_pattern_to_odpg()
886 0x1 | (pattern_table[pattern].num_of_phases_tx << 5) | in ddr3_tip_load_pattern_to_mem()
887 (pattern_table[pattern].tx_burst_size << 11) | in ddr3_tip_load_pattern_to_mem()
888 (pattern_table[pattern].delay_between_bursts << 15) | in ddr3_tip_load_pattern_to_mem()
889 (pattern_table[pattern].num_of_phases_rx << 21) | (0x1 << 25) | in ddr3_tip_load_pattern_to_mem()
906 pattern_table[pattern].start_addr); in ddr3_tip_load_pattern_to_mem()
[all …]
H A Dddr3_training_leveling.c48 struct pattern_info *pattern_table = ddr3_tip_get_pattern_table(); in ddr3_tip_dynamic_read_leveling() local
92 pattern_table[PATTERN_RL].num_of_phases_tx, 0, in ddr3_tip_dynamic_read_leveling()
93 pattern_table[PATTERN_RL].num_of_phases_rx, 0, 0, in ddr3_tip_dynamic_read_leveling()
99 pattern_table[PATTERN_RL]. in ddr3_tip_dynamic_read_leveling()
411 struct pattern_info *pattern_table = ddr3_tip_get_pattern_table(); in ddr3_tip_dynamic_per_bit_read_leveling() local
466 pattern_table[PATTERN_TEST].num_of_phases_tx, 0, in ddr3_tip_dynamic_per_bit_read_leveling()
467 pattern_table[PATTERN_TEST].num_of_phases_rx, 0, in ddr3_tip_dynamic_per_bit_read_leveling()
473 pattern_table[PATTERN_TEST]. in ddr3_tip_dynamic_per_bit_read_leveling()
1373 struct pattern_info *pattern_table = ddr3_tip_get_pattern_table(); in ddr3_tip_xsb_compare_test() local
1392 ((pattern_table[PATTERN_TEST].start_addr << 3) + in ddr3_tip_xsb_compare_test()
H A Dddr3_init.h55 extern struct pattern_info pattern_table[];