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Searched refs:out_le32 (Results 1 – 25 of 64) sorted by relevance

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/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dpcie.c71 out_le32(&out_win->tarl, dev_base); in mpc83xx_pcie_remap_cfg()
104 PCIE_OP(write, dword, u32, out_le32) in PCIE_OP()
191 out_le32(&pex->bridge.pex_csb_ctrl, in mpc83xx_pcie_init_bus()
196 out_le32(&pex->bridge.pex_csb_obctrl, PEX_CSB_OBCTRL_PIOE | in mpc83xx_pcie_init_bus()
201 out_le32(&out_win->ar, PEX_OWAR_EN | PEX_OWAR_TYPE_CFG | in mpc83xx_pcie_init_bus()
203 out_le32(&out_win->bar, mpc83xx_pcie_cfg_space[bus].base); in mpc83xx_pcie_init_bus()
204 out_le32(&out_win->tarl, 0); in mpc83xx_pcie_init_bus()
205 out_le32(&out_win->tarh, 0); in mpc83xx_pcie_init_bus()
214 out_le32(&out_win->bar, reg[i].phys_start); in mpc83xx_pcie_init_bus()
215 out_le32(&out_win->tarl, reg[i].bus_start); in mpc83xx_pcie_init_bus()
[all …]
/openbmc/u-boot/drivers/ata/
H A Dsata_mv.c287 out_le32(priv->regbase + EDMA_CMD, EDMA_CMD_DISEDMA); in mv_stop_edma_engine()
321 out_le32(priv->regbase + EDMA_IECR, 0x0); in mv_start_edma_engine()
325 out_le32(SATAHC_BASE + SATAHC_ICR, tmp); in mv_start_edma_engine()
331 out_le32(priv->regbase + EDMA_CFG, tmp); in mv_start_edma_engine()
333 out_le32(priv->regbase + SIR_FIS_IRQ_CAUSE, 0x0); in mv_start_edma_engine()
336 out_le32(priv->regbase + SIR_FIS_CFG, 0x0); in mv_start_edma_engine()
339 out_le32(priv->regbase + EDMA_RQBA_HI, 0x0); in mv_start_edma_engine()
340 out_le32(priv->regbase + EDMA_RQIPR, priv->request); in mv_start_edma_engine()
341 out_le32(priv->regbase + EDMA_RQOPR, 0x0); in mv_start_edma_engine()
344 out_le32(priv->regbase + EDMA_RSBA_HI, 0x0); in mv_start_edma_engine()
[all …]
H A Dfsl_sata.c162 out_le32(&reg->hcontrol, val32); in init_sata()
168 out_le32(&reg->chba, (u32)cmd_hdr & ~0x3); in init_sata()
173 out_le32(&reg->hcontrol, val32); in init_sata()
178 out_le32(&reg->hcontrol, val32); in init_sata()
182 out_le32(&reg->hstatus, val32); in init_sata()
185 out_le32(&reg->icc, 0x01000000); in init_sata()
188 out_le32(&reg->cqpmp, 0); in init_sata()
192 out_le32(&reg->serror, val32); in init_sata()
196 out_le32(&reg->cer, val32); in init_sata()
200 out_le32(&reg->der, val32); in init_sata()
[all …]
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dsoc.c116 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); in erratum_a008850_early()
133 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in erratum_a008850_post()
185 out_le32(&cci->slave[0].snoop_ctrl, in arch_soc_init()
187 out_le32(&cci->slave[1].snoop_ctrl, in arch_soc_init()
189 out_le32(&cci->slave[2].snoop_ctrl, in arch_soc_init()
191 out_le32(&cci->slave[4].snoop_ctrl, in arch_soc_init()
200 out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); in arch_soc_init()
201 out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE); in arch_soc_init()
H A Dls102xa_psci.c36 out_le32(&scfg->sparecr[2], dest); in ls1_save_ddr_head()
166 out_le32(&scfg->sparecr[3], entry_point); in ls1_deep_sleep()
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c187 out_le32(eddrtqcr1, 0x63b30002); in erratum_a008336()
192 out_le32(eddrtqcr1, 0x63b30002); in erratum_a008336()
208 out_le32(eddrtqcr1, 0x63b20002); in erratum_a008514()
264 out_le32(dcfg_dcsr + DCFG_DCSR_PORCR1 / 4, val); in erratum_rcw_src()
307 out_le32(SMMU_SCR0, val); in bypass_smmu()
309 out_le32(SMMU_NSCR0, val); in bypass_smmu()
422 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); in erratum_a008850_early()
443 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in erratum_a008850_post()
619 out_le32(&cci->slave[4].snoop_ctrl, in fsl_lsch2_early_init_f()
671 out_le32(qspi_key, 0x5af05af0); in qspi_ahb_init()
[all …]
H A Dspl.c45 out_le32(SMMU_SCR0, val); in spl_board_init()
47 out_le32(SMMU_NSCR0, val); in spl_board_init()
/openbmc/u-boot/drivers/net/
H A Dvsc9953.c76 out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) | in vsc9953_mdio_write()
104 out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) | in vsc9953_mdio_read()
215 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); in vsc9953_vlan_table_membership_set()
227 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); in vsc9953_vlan_table_membership_set()
242 out_le32(&l2ana_reg->ana_tables.vlan_access, val); in vsc9953_vlan_table_membership_set()
272 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val); in vsc9953_vlan_membership_show()
308 out_le32(&l2ana_reg->ana_tables.vlan_tidx, in vsc9953_vlan_table_membership_all_set()
320 out_le32(&l2ana_reg->ana_tables.vlan_tidx, in vsc9953_vlan_table_membership_all_set()
374 out_le32(&l2ana_reg->port[port_no].vlan_cfg, val); in vsc9953_port_vlan_pvid_set()
380 out_le32(&l2rew_reg->port[port_no].port_vlan_cfg, val); in vsc9953_port_vlan_pvid_set()
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/omap3/
H A Dclock.c783 out_le32(&prcm_base->fclken_iva2, FCK_IVA2_ON); in per_clocks_enable()
785 out_le32(&prcm_base->fclken1_core, FCK_CORE1_ON); in per_clocks_enable()
786 out_le32(&prcm_base->iclken1_core, ICK_CORE1_ON); in per_clocks_enable()
787 out_le32(&prcm_base->iclken2_core, ICK_CORE2_ON); in per_clocks_enable()
788 out_le32(&prcm_base->fclken_wkup, FCK_WKUP_ON); in per_clocks_enable()
789 out_le32(&prcm_base->iclken_wkup, ICK_WKUP_ON); in per_clocks_enable()
790 out_le32(&prcm_base->fclken_dss, FCK_DSS_ON); in per_clocks_enable()
791 out_le32(&prcm_base->iclken_dss, ICK_DSS_ON); in per_clocks_enable()
793 out_le32(&prcm_base->fclken_cam, FCK_CAM_ON); in per_clocks_enable()
794 out_le32(&prcm_base->iclken_cam, ICK_CAM_ON); in per_clocks_enable()
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dsoc.h22 #define gur_out32(a, v) out_le32(a, v)
30 #define scfg_out32(a, v) out_le32(a, v)
42 #define pex_lut_out32(a, v) out_le32(a, v)
/openbmc/u-boot/drivers/pci/
H A Dpci_indirect.c44 out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
55 INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
/openbmc/u-boot/board/freescale/ls1046ardb/
H A Dls1046ardb.c81 out_le32(SMMU_SCR0, val); in board_init()
83 out_le32(SMMU_NSCR0, val); in board_init()
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dio.h94 # define out_le32(b, addr) *(u32 *)(addr) = _swapl(b) macro
101 # define out_le32(b, addr) *(u32 *)(addr) = (b) macro
/openbmc/u-boot/board/freescale/common/
H A Dls102xa_stream_id.c33 out_le32((u32 *)(tbl[i].reg_offset), liodn); in ls1021x_config_caam_stream_id()
/openbmc/u-boot/board/freescale/ls2080ardb/
H A Dls2080ardb.c230 out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK); in board_init()
272 out_le32(GPIO4_GPDIR_ADDR, (1 << 21 | in misc_init_r()
274 out_le32(GPIO4_GPDAT_ADDR, (~(1 << 21) & in misc_init_r()
/openbmc/u-boot/include/
H A Dfsl_esdhc.h235 #define esdhc_write32 out_le32
247 #define esdhc_write32 out_le32
H A Dfsl_sec_mon.h16 #define sec_mon_out32(a, v) out_le32(a, v)
H A Dbootcount.h74 out_le32(addr, data); in raw_bootcount_store()
/openbmc/u-boot/board/freescale/ls1043ardb/
H A Dls1043ardb.c207 out_le32(SMMU_SCR0, val); in board_init()
209 out_le32(SMMU_NSCR0, val); in board_init()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dio.h34 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
61 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
69 #define outl_p(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
238 static inline void out_le32(volatile unsigned __iomem *addr, u32 val) in out_le32() function
/openbmc/u-boot/arch/arm/mach-meson/
H A Dboard-axg.c106 out_le32(AXG_ETH_REG_0, AXG_ETH_REG_0_PHY_INTF_RMII | in meson_eth_init()
H A Dboard-gx.c124 out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK | in meson_eth_init()
/openbmc/u-boot/drivers/usb/host/
H A Dehci-fsl.c255 out_le32(&(hcor)->or_portsc[0], PORT_PTS_UTMI); in ehci_fsl_init()
266 out_le32(&(hcor)->or_portsc[0], PORT_PTS_ULPI); in ehci_fsl_init()
/openbmc/u-boot/board/freescale/ls1046aqds/
H A Dls1046aqds.c419 out_le32(SMMU_SCR0, val); in board_init()
421 out_le32(SMMU_NSCR0, val); in board_init()
/openbmc/u-boot/board/freescale/ls1012afrdm/
H A Dls1012afrdm.c168 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in board_init()

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