183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
293a686eeSJean-Christophe PLAGNIOL-VILLARD /*
393a686eeSJean-Christophe PLAGNIOL-VILLARD * Support for indirect PCI bridges.
493a686eeSJean-Christophe PLAGNIOL-VILLARD *
593a686eeSJean-Christophe PLAGNIOL-VILLARD * Copyright (C) 1998 Gabriel Paubert.
693a686eeSJean-Christophe PLAGNIOL-VILLARD */
793a686eeSJean-Christophe PLAGNIOL-VILLARD
893a686eeSJean-Christophe PLAGNIOL-VILLARD #include <common.h>
993a686eeSJean-Christophe PLAGNIOL-VILLARD
10*e097ce43SMario Six #if !defined(__I386__) && !defined(CONFIG_DM_PCI)
1193a686eeSJean-Christophe PLAGNIOL-VILLARD
1293a686eeSJean-Christophe PLAGNIOL-VILLARD #include <asm/processor.h>
1393a686eeSJean-Christophe PLAGNIOL-VILLARD #include <asm/io.h>
1493a686eeSJean-Christophe PLAGNIOL-VILLARD #include <pci.h>
1593a686eeSJean-Christophe PLAGNIOL-VILLARD
1693a686eeSJean-Christophe PLAGNIOL-VILLARD #define cfg_read(val, addr, type, op) *val = op((type)(addr))
1793a686eeSJean-Christophe PLAGNIOL-VILLARD #define cfg_write(val, addr, type, op) op((type *)(addr), (val))
1893a686eeSJean-Christophe PLAGNIOL-VILLARD
192eb48ff7SHeiko Schocher #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
2093a686eeSJean-Christophe PLAGNIOL-VILLARD #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
2193a686eeSJean-Christophe PLAGNIOL-VILLARD static int \
2293a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_##rw##_config_##size(struct pci_controller *hose, \
2393a686eeSJean-Christophe PLAGNIOL-VILLARD pci_dev_t dev, int offset, type val) \
2493a686eeSJean-Christophe PLAGNIOL-VILLARD { \
2593a686eeSJean-Christophe PLAGNIOL-VILLARD u32 b, d,f; \
2693a686eeSJean-Christophe PLAGNIOL-VILLARD b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
2793a686eeSJean-Christophe PLAGNIOL-VILLARD b = b - hose->first_busno; \
2893a686eeSJean-Christophe PLAGNIOL-VILLARD dev = PCI_BDF(b, d, f); \
2993a686eeSJean-Christophe PLAGNIOL-VILLARD *(hose->cfg_addr) = dev | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; \
3093a686eeSJean-Christophe PLAGNIOL-VILLARD sync(); \
3193a686eeSJean-Christophe PLAGNIOL-VILLARD cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
3293a686eeSJean-Christophe PLAGNIOL-VILLARD return 0; \
3393a686eeSJean-Christophe PLAGNIOL-VILLARD }
3493a686eeSJean-Christophe PLAGNIOL-VILLARD #else
3593a686eeSJean-Christophe PLAGNIOL-VILLARD #define INDIRECT_PCI_OP(rw, size, type, op, mask) \
3693a686eeSJean-Christophe PLAGNIOL-VILLARD static int \
3793a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_##rw##_config_##size(struct pci_controller *hose, \
3893a686eeSJean-Christophe PLAGNIOL-VILLARD pci_dev_t dev, int offset, type val) \
3993a686eeSJean-Christophe PLAGNIOL-VILLARD { \
4093a686eeSJean-Christophe PLAGNIOL-VILLARD u32 b, d,f; \
4193a686eeSJean-Christophe PLAGNIOL-VILLARD b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
4293a686eeSJean-Christophe PLAGNIOL-VILLARD b = b - hose->first_busno; \
4393a686eeSJean-Christophe PLAGNIOL-VILLARD dev = PCI_BDF(b, d, f); \
4493a686eeSJean-Christophe PLAGNIOL-VILLARD out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
4593a686eeSJean-Christophe PLAGNIOL-VILLARD cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
4693a686eeSJean-Christophe PLAGNIOL-VILLARD return 0; \
4793a686eeSJean-Christophe PLAGNIOL-VILLARD }
4893a686eeSJean-Christophe PLAGNIOL-VILLARD #endif
4993a686eeSJean-Christophe PLAGNIOL-VILLARD
5093a686eeSJean-Christophe PLAGNIOL-VILLARD INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
5193a686eeSJean-Christophe PLAGNIOL-VILLARD INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2)
5293a686eeSJean-Christophe PLAGNIOL-VILLARD INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0)
5393a686eeSJean-Christophe PLAGNIOL-VILLARD INDIRECT_PCI_OP(write, byte, u8, out_8, 3)
5493a686eeSJean-Christophe PLAGNIOL-VILLARD INDIRECT_PCI_OP(write, word, u16, out_le16, 2)
5593a686eeSJean-Christophe PLAGNIOL-VILLARD INDIRECT_PCI_OP(write, dword, u32, out_le32, 0)
5693a686eeSJean-Christophe PLAGNIOL-VILLARD
pci_setup_indirect(struct pci_controller * hose,u32 cfg_addr,u32 cfg_data)5793a686eeSJean-Christophe PLAGNIOL-VILLARD void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
5893a686eeSJean-Christophe PLAGNIOL-VILLARD {
5993a686eeSJean-Christophe PLAGNIOL-VILLARD pci_set_ops(hose,
6093a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_read_config_byte,
6193a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_read_config_word,
6293a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_read_config_dword,
6393a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_write_config_byte,
6493a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_write_config_word,
6593a686eeSJean-Christophe PLAGNIOL-VILLARD indirect_write_config_dword);
6693a686eeSJean-Christophe PLAGNIOL-VILLARD
6793a686eeSJean-Christophe PLAGNIOL-VILLARD hose->cfg_addr = (unsigned int *) cfg_addr;
6893a686eeSJean-Christophe PLAGNIOL-VILLARD hose->cfg_data = (unsigned char *) cfg_data;
6993a686eeSJean-Christophe PLAGNIOL-VILLARD }
7093a686eeSJean-Christophe PLAGNIOL-VILLARD
7129161f47SMichael Schwingen #endif /* !__I386__ */
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