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Searched refs:num_pipe_per_mec (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v10_3.c60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
115 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v10_3()
116 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v10_3()
197 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v10_3()
198 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v10_3()
289 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v10_3()
290 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v10_3()
H A Damdgpu_amdkfd_gfx_v8.c60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
118 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
119 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
172 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hqd_load()
173 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hqd_load()
H A Damdgpu_amdkfd_gfx_v11.c58 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
59 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
111 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v11()
112 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v11()
182 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v11()
183 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v11()
274 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v11()
275 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v11()
H A Damdgpu_amdkfd_gfx_v7.c66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
123 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
124 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
H A Damdgpu_amdkfd_gfx_v9.c66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_acquire_queue()
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_acquire_queue()
166 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts()
167 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_init_interrupts()
316 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_hiq_mqd_load()
317 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_hiq_mqd_load()
1051 max_queue_cnt = adev->gfx.mec.num_pipe_per_mec * in kgd_gfx_v9_get_cu_occupancy()
H A Damdgpu_amdkfd_gfx_v10.c60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
146 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
147 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
303 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hiq_mqd_load()
304 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hiq_mqd_load()
H A Damdgpu_gfx.c47 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
60 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
62 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
211 int max_queues_per_mec = min(adev->gfx.mec.num_pipe_per_mec * in amdgpu_gfx_compute_queue_acquire()
221 pipe = i % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
222 queue = (i / adev->gfx.mec.num_pipe_per_mec) % in amdgpu_gfx_compute_queue_acquire()
278 * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_kiq_acquire()
H A Damdgpu_amdkfd.c152 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init()
173 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
H A Damdgpu_gfx.h112 u32 num_pipe_per_mec; member
H A Dgfx_v7_0.c2736 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init()
2803 size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe) in gfx_v7_0_compute_pipe_init()
3049 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) in gfx_v7_0_cp_compute_resume()
4370 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v7_0_compute_ring_init()
4402 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v7_0_sw_init()
4457 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v7_0_sw_init()
H A Dgfx_v11_0.c956 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v11_0_compute_ring_init()
1322 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1331 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1339 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1421 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_sw_init()
2417 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_config_mec_cache_rs64()
3505 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_cp_compute_load_microcode_rs64()
4451 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_soft_reset()
H A Dgfx_v9_4_3.c769 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v9_4_3_compute_ring_init()
785 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_4_3_sw_init()
826 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; in gfx_v9_4_3_sw_init()
3011 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v9_4_3_emit_wave_limit()
H A Dgfx_v8_0.c1883 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v8_0_compute_ring_init()
1924 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v8_0_sw_init()
2003 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v8_0_sw_init()
6866 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v8_0_emit_wave_limit()
H A Dgfx_v9_0.c1988 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v9_0_compute_ring_init()
2021 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_0_sw_init()
2132 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_0_sw_init()
6841 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v9_0_emit_wave_limit()
H A Dgfx_v10_0.c4474 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v10_0_compute_ring_init()
4499 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4514 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4522 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4593 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v10_0_sw_init()
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dkgd_kfd_interface.h120 uint32_t num_pipe_per_mec; member
/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_device_queue_manager.c81 int pipe_offset = (mec * dqm->dev->kfd->shared_resources.num_pipe_per_mec in is_pipe_enabled()
105 return dqm->dev->kfd->shared_resources.num_pipe_per_mec; in get_pipes_per_mec()
1572 / dqm->dev->kfd->shared_resources.num_pipe_per_mec; in set_sched_resources()