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Searched refs:msb (Results 1 – 25 of 47) sorted by relevance

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/openbmc/qemu/tests/fp/
H A Dfp-test-log2.c27 int msb; in compare() local
33 msb = 63 - __builtin_clzll(real.i ^ soft.i); in compare()
35 if (msb < 52) { in compare()
53 if (msb == 63) { in compare()
55 } else if (msb >= 52) { in compare()
/openbmc/u-boot/drivers/power/
H A Dtwl6030.c34 u8 msb = 0; in twl6030_gpadc_read_channel() local
43 twl->adc_rbase + 1 + channel_no * 2, &msb); in twl6030_gpadc_read_channel()
47 return (msb << 8) | lsb; in twl6030_gpadc_read_channel()
112 u8 msb = 0; in twl6030_get_battery_current() local
115 twl6030_i2c_read_u8(TWL6030_CHIP_CHARGER, FG_REG_11, &msb); in twl6030_get_battery_current()
117 battery_current = ((msb << 8) | lsb); in twl6030_get_battery_current()
/openbmc/u-boot/drivers/gpio/
H A Dpca953x.c153 int msb = nr_gpio - 1; in pca953x_info() local
157 for (i = msb; i >= 0; i--) in pca953x_info()
167 for (i = msb; i >= 0; i--) in pca953x_info()
174 for (i = msb; i >= 0; i--) in pca953x_info()
181 for (i = msb; i >= 0; i--) in pca953x_info()
188 for (i = msb; i >= 0; i--) in pca953x_info()
/openbmc/u-boot/board/compulab/cm_t3517/
H A Dcm_t3517.c135 u32 msb = __raw_readl(CONTROL_EFUSE_EMAC_MSB); in am3517_get_efuse_enetaddr() local
137 enetaddr[0] = (u8)((msb >> 16) & 0xff); in am3517_get_efuse_enetaddr()
138 enetaddr[1] = (u8)((msb >> 8) & 0xff); in am3517_get_efuse_enetaddr()
139 enetaddr[2] = (u8)(msb & 0xff); in am3517_get_efuse_enetaddr()
/openbmc/u-boot/drivers/power/pmic/
H A Drk8xx.c79 uint8_t msb, lsb; in rk8xx_probe() local
82 rk8xx_read(dev, ID_MSB, &msb, 1); in rk8xx_probe()
85 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK; in rk8xx_probe()
/openbmc/qemu/target/riscv/
H A Dxthead.decode29 &th_bfext msb lsb rs1 rd
39 @th_bfext msb:6 lsb:6 ..... ... ..... ....... &th_bfext %rs1 %rd
/openbmc/u-boot/board/Seagate/nas220/
H A Dkwbimage.cfg51 # bit20: TRAS msb
103 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/Seagate/dockstar/
H A Dkwbimage.cfg50 # bit20: TRAS msb
100 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/Synology/ds109/
H A Dkwbimage.cfg51 # bit20: TRAS msb
101 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/Seagate/goflexhome/
H A Dkwbimage.cfg53 # bit20: TRAS msb
103 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/Marvell/dreamplug/
H A Dkwbimage.cfg48 # bit20: TRAS msb
98 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/Marvell/sheevaplug/
H A Dkwbimage.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/Marvell/guruplug/
H A Dkwbimage.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/LaCie/netspace_v2/
H A Dkwbimage.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, enabled
H A Dkwbimage-is2.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, enabled
H A Dkwbimage-ns2l.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, enabled
/openbmc/u-boot/board/cloudengines/pogo_e02/
H A Dkwbimage.cfg51 # bit20: TRAS msb
101 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/iomega/iconnect/
H A Dkwbimage.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/Marvell/openrd/
H A Dkwbimage.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, (disabled)
/openbmc/u-boot/board/LaCie/net2big_v2/
H A Dkwbimage.cfg47 # bit20: TRAS msb
97 # bit6: 1, DDR ODT control msb, enabled
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage.cfg68 # bit20: TRAS msb
109 # bit6: 1, DDR ODT control msb, enabled
H A Dkwbimage-memphis.cfg71 # bit20: TRAS msb
112 # bit6: 0, DDR ODT control msb disabled
/openbmc/u-boot/board/raidsonic/ib62x0/
H A Dkwbimage.cfg48 # bit20: TRAS msb
98 # bit6: 0, DDR ODT control msb, (disabled)
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.c.inc1138 int msb, int lsb, int ofs, int z)
1142 tcg_out16(s, (msb << 8) | (z << 7) | lsb);
1193 int msb, lsb;
1195 /* Achieve wraparound by swapping msb and lsb. */
1196 msb = 64 - ctz64(~val);
1199 msb = clz64(val);
1202 tcg_out_risbg(s, out, in, msb, lsb, 0, 1);
1586 unsigned msb = lsb - (len - 1);
1599 tcg_out_risbg(s, a0, a2, msb, lsb, ofs, false);
1606 unsigned msb = lsb - (len - 1);
[all …]
/openbmc/qemu/fpu/
H A Dsoftfloat-specialize.c.inc94 * the msb must be zero. MIPS is (so far) unique in supporting both the
112 bool msb = extract64(frac, DECOMPOSED_BINARY_POINT - 1, 1);
113 return msb == snan_bit_is_one(status);

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