Home
last modified time | relevance | path

Searched refs:mpcc_count (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h262 unsigned int mpcc_count; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.c1421 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn301_resource_construct()
1619 pool->base.mpcc_count = j; in dcn301_resource_construct()
1636 pool->base.mpc = dcn301_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn301_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_resource.c1097 pool->base.mpcc_count = 5; in dcn201_resource_construct()
1257 pool->base.mpc = dcn201_mpc_create(ctx, pool->base.mpcc_count); in dcn201_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/
H A Ddcn302_resource.c1214 pool->mpcc_count = pool->res_cap->num_timing_generator; in dcn302_resource_construct()
1420 pool->mpc = dcn302_mpc_create(ctx, pool->mpcc_count, pool->res_cap->num_mpc_3dlut); in dcn302_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/
H A Ddcn303_resource.c1137 pool->mpcc_count = pool->res_cap->num_timing_generator; in dcn303_resource_construct()
1332 pool->mpc = dcn303_mpc_create(ctx, pool->mpcc_count, pool->res_cap->num_mpc_3dlut); in dcn303_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/
H A Ddcn316_resource.c1744 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn316_resource_construct()
1948 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn316_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/
H A Ddcn315_resource.c1857 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn315_resource_construct()
2061 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn315_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_resource.c1861 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn314_resource_construct()
2086 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn314_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_resource.c1888 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn31_resource_construct()
2120 pool->base.mpc = dcn31_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn31_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c2281 pool->base.mpcc_count = pool->base.res_cap->num_timing_generator; in dcn30_resource_construct()
2508 pool->base.mpc = dcn30_mpc_create(ctx, pool->base.mpcc_count, pool->base.res_cap->num_mpc_3dlut); in dcn30_resource_construct()
H A Ddcn30_hwseq.c236 ASSERT(wb_info->mpcc_inst < dc->res_pool->mpcc_count); in dcn30_set_writeback()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c2407 pool->base.mpcc_count = 5; in dcn20_resource_construct()
2411 pool->base.mpcc_count = 6; in dcn20_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c1661 pool->base.mpcc_count = j; in dcn21_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/
H A Ddcn321_resource.c1688 pool->base.mpcc_count = num_pipes; in dcn321_resource_construct()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource.c2145 pool->base.mpcc_count = num_pipes; in dcn32_resource_construct()