| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm660.dtsi | 171 assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
172 <&mmcc PCLK1_CLK_SRC>;
176 clocks = <&mmcc MDSS_MDP_CLK>,
177 <&mmcc MDSS_BYTE1_CLK>,
178 <&mmcc MDSS_BYTE1_INTF_CLK>,
179 <&mmcc MNOC_AHB_CLK>,
180 <&mmcc MDSS_AHB_CLK>,
181 <&mmcc MDSS_AXI_CLK>,
182 <&mmcc MISC_AHB_CLK>,
183 <&mmcc MDSS_PCLK1_CLK>,
[all …]
|
| H A D | sdm630.dtsi | 9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
711 <&mmcc AHB_CLK_SRC>;
1451 mmcc: clock-controller@c8c0000 { label
1452 compatible = "qcom,mmcc-sdm630";
1485 power-domains = <&mmcc MDSS_GDSC>;
1487 clocks = <&mmcc MDSS_AHB_CLK>,
1488 <&mmcc MDSS_AXI_CLK>,
1489 <&mmcc MDSS_VSYNC_CLK>,
1490 <&mmcc MDSS_MDP_CLK>;
1514 assigned-clocks = <&mmcc MDSS_MDP_CLK>,
[all …]
|
| H A D | msm8996.dtsi | 8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
921 <&mmcc AHB_CLK_SRC>;
949 mmcc: clock-controller@8c0000 { label
950 compatible = "qcom,mmcc-msm8996";
971 assigned-clocks = <&mmcc MMPLL9_PLL>,
972 <&mmcc MMPLL1_PLL>,
973 <&mmcc MMPLL3_PLL>,
974 <&mmcc MMPLL4_PLL>,
975 <&mmcc MMPLL5_PLL>;
993 power-domains = <&mmcc MDSS_GDSC>;
[all …]
|
| H A D | msm8996pro-xiaomi-scorpio.dts | 36 clocks = <&mmcc MDSS_MDP_CLK>,
37 <&mmcc MMSS_MMAGIC_AHB_CLK>,
38 <&mmcc MDSS_AHB_CLK>,
39 <&mmcc MDSS_AXI_CLK>,
40 <&mmcc MMSS_MISC_AHB_CLK>,
41 <&mmcc MDSS_BYTE0_CLK>,
42 <&mmcc MDSS_PCLK0_CLK>,
43 <&mmcc MDSS_ESC0_CLK>,
44 <&mmcc SMMU_MDP_AHB_CLK>,
45 <&mmcc SMMU_MDP_AXI_CLK>;
[all …]
|
| H A D | msm8992-xiaomi-libra.dts | 49 clocks = <&mmcc MDSS_AHB_CLK>,
50 <&mmcc MDSS_AXI_CLK>,
51 <&mmcc MDSS_VSYNC_CLK>,
52 <&mmcc MDSS_MDP_CLK>,
53 <&mmcc MDSS_BYTE0_CLK>,
54 <&mmcc MDSS_PCLK0_CLK>,
55 <&mmcc MDSS_ESC0_CLK>;
56 power-domains = <&mmcc MDSS_GDSC>;
|
| H A D | msm8998-oneplus-common.dtsi | 39 clocks = <&mmcc MDSS_AHB_CLK>,
40 <&mmcc MDSS_AXI_CLK>,
41 <&mmcc MDSS_VSYNC_CLK>,
42 <&mmcc MDSS_MDP_CLK>,
43 <&mmcc MDSS_BYTE0_CLK>,
44 <&mmcc MDSS_BYTE0_INTF_CLK>,
45 <&mmcc MDSS_PCLK0_CLK>,
46 <&mmcc MDSS_ESC0_CLK>;
47 power-domains = <&mmcc MDSS_GDSC>;
|
| H A D | msm8992.dtsi | 18 &mmcc {
19 compatible = "qcom,mmcc-msm8992";
|
| H A D | msm8998.dtsi | 7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
2732 mmcc: clock-controller@c8c0000 { label
2733 compatible = "qcom,mmcc-msm8998";
2770 clocks = <&mmcc MDSS_AHB_CLK>,
2771 <&mmcc MDSS_AXI_CLK>,
2772 <&mmcc MDSS_MDP_CLK>;
2777 power-domains = <&mmcc MDSS_GDSC>;
2800 clocks = <&mmcc MDSS_AHB_CLK>,
2801 <&mmcc MDSS_AXI_CLK>,
2802 <&mmcc MNOC_AHB_CLK>,
[all …]
|
| H A D | msm8994.dtsi | 8 #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
1046 mmcc: clock-controller@fd8c0000 { label
1047 compatible = "qcom,mmcc-msm8994";
1072 assigned-clocks = <&mmcc MMPLL0_PLL>,
1073 <&mmcc MMPLL1_PLL>,
1074 <&mmcc MMPLL3_PLL>,
1075 <&mmcc MMPLL4_PLL>,
1076 <&mmcc MMPLL5_PLL>;
1091 <&mmcc OCMEMCX_OCMEMNOC_CLK>;
|
| H A D | msm8998-clamshell.dtsi | 102 &mmcc {
|
| H A D | msm8996-oneplus-common.dtsi | 204 &mmcc {
|
| H A D | msm8996-xiaomi-common.dtsi | 265 &mmcc {
|
| H A D | msm8996-sony-xperia-tone.dtsi | 189 &mmcc {
|
| H A D | apq8096-db820c.dts | 249 &mmcc {
|
| /openbmc/linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-apq8064.dtsi | 7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
846 mmcc: clock-controller@4000000 { label
847 compatible = "qcom,mmcc-apq8064";
1180 <&mmcc GFX3D_CLK>,
1181 <&mmcc GFX3D_AHB_CLK>,
1182 <&mmcc GFX3D_AXI_CLK>,
1183 <&mmcc MMSS_IMEM_AHB_CLK>;
1280 clocks = <&mmcc DSI_M_AHB_CLK>,
1281 <&mmcc DSI_S_AHB_CLK>,
1282 <&mmcc AMP_AHB_CLK>,
[all …]
|
| H A D | qcom-msm8226.dtsi | 10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
322 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
323 <&mmcc CAMSS_CCI_CCI_AHB_CLK>,
324 <&mmcc CAMSS_CCI_CCI_CLK>;
395 mmcc: clock-controller@fd8c0000 { label
396 compatible = "qcom,mmcc-msm8226";
823 power-domains = <&mmcc MDSS_GDSC>;
825 clocks = <&mmcc MDSS_AHB_CLK>,
826 <&mmcc MDSS_AXI_CLK>,
827 <&mmcc MDSS_VSYNC_CLK>;
[all …]
|
| H A D | qcom-msm8974.dtsi | 7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
1113 clocks = <&mmcc MMSS_S0_AXI_CLK>,
1114 <&mmcc MMSS_S0_AXI_CLK>;
1829 mmcc: clock-controller@fd8c0000 { label
1830 compatible = "qcom,mmcc-msm8974";
1866 power-domains = <&mmcc MDSS_GDSC>;
1868 clocks = <&mmcc MDSS_AHB_CLK>,
1869 <&mmcc MDSS_AXI_CLK>,
1870 <&mmcc MDSS_VSYNC_CLK>;
1892 clocks = <&mmcc MDSS_AHB_CLK>,
[all …]
|
| H A D | qcom-msm8960.dtsi | 163 compatible = "qcom,mmcc-msm8960";
|
| H A D | qcom-apq8026-samsung-matisse-wifi.dts | 126 clocks = <&mmcc CAMSS_GP0_CLK>;
|
| H A D | qcom-msm8974-lge-nexus5-hammerhead.dts | 46 clocks = <&mmcc CAMSS_GP1_CLK>;
|
| /openbmc/linux/sound/soc/codecs/ |
| H A D | cs42l73.c | 33 u8 spc, mmcc, spfs; member
785 u8 mmcc; member
940 u8 spc, mmcc; in cs42l73_set_dai_fmt() local
943 mmcc = snd_soc_component_read(component, CS42L73_MMCC(id)); in cs42l73_set_dai_fmt()
947 mmcc |= CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
951 mmcc &= ~CS42L73_MS_MASTER; in cs42l73_set_dai_fmt()
967 if (mmcc & CS42L73_MS_MASTER) { in cs42l73_set_dai_fmt()
1003 priv->config[id].mmcc = mmcc; in cs42l73_set_dai_fmt()
1055 if (priv->config[id].mmcc & CS42L73_MS_MASTER) { in cs42l73_pcm_hw_params()
1067 cs42l73_mclk_coeffs[mclk_coeff].mmcc); in cs42l73_pcm_hw_params()
[all …]
|
| /openbmc/linux/drivers/clk/qcom/ |
| H A D | Makefile | 22 obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
50 obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
51 obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
52 obj-$(CONFIG_MSM_MMCC_8994) += mmcc-msm8994.o
53 obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
54 obj-$(CONFIG_MSM_MMCC_8998) += mmcc-msm8998.o
93 obj-$(CONFIG_SDM_MMCC_660) += mmcc-sdm660.o
|
| /openbmc/linux/Documentation/devicetree/bindings/iommu/ |
| H A D | msm,iommu-v0.txt | 50 <&mmcc SMMU_AHB_CLK>,
51 <&mmcc MDP_AXI_CLK>;
|
| /openbmc/linux/ |
| H A D | opengrok1.0.log | [all...] |
| H A D | opengrok2.0.log | [all...] |