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Searched refs:mmTHM_THERMAL_INT_CTRL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/thm/
H A Dthm_11_0_2_offset.h46 #define mmTHM_THERMAL_INT_CTRL … macro
H A Dthm_10_0_offset.h40 #define mmTHM_THERMAL_INT_CTRL … macro
H A Dthm_9_0_offset.h48 #define mmTHM_THERMAL_INT_CTRL … macro
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_thermal.c189 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in vega12_thermal_set_temperature_range()
199 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in vega12_thermal_set_temperature_range()
H A Dvega20_thermal.c260 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in vega20_thermal_set_temperature_range()
270 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in vega20_thermal_set_temperature_range()
H A Dvega10_thermal.c389 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in vega10_thermal_set_temperature_range()
399 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in vega10_thermal_set_temperature_range()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c1340 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in smu_v11_0_set_irq_state()
1343 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in smu_v11_0_set_irq_state()
1360 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); in smu_v11_0_set_irq_state()
1368 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); in smu_v11_0_set_irq_state()