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Searched refs:mmMP1_SMN_C2PMSG_90_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
H A Dmp_12_0_0_offset.h299 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro
H A Dmp_10_0_offset.h299 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro
H A Dmp_9_0_offset.h311 #define mmMP1_SMN_C2PMSG_90_BASE_IDX 0 macro
H A Dmp_11_0_8_offset.h299 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro
H A Dmp_11_0_offset.h301 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro
H A Dmp_11_5_0_offset.h299 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_4_ppt.c53 #define mmMP1_SMN_C2PMSG_90_BASE_IDX 1 macro
H A Dsmu_v13_0.c71 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro
H A Dsmu_v13_0_0_ppt.c80 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c51 #define mmMP1_SMN_C2PMSG_90_BASE_IDX … macro