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Searched refs:mmDPCSTX5_DPCSTX_PLL_UPDATE_ADDR (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_0_0_offset.h503 #define mmDPCSTX5_DPCSTX_PLL_UPDATE_ADDR … macro
H A Ddpcs_2_0_0_offset.h558 #define mmDPCSTX5_DPCSTX_PLL_UPDATE_ADDR … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_2_d.h10035 #define mmDPCSTX5_DPCSTX_PLL_UPDATE_ADDR 0x9bf8 macro