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Searched refs:miisel (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/board/ti/am43xx/
H A Dboard.c927 writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); in board_eth_init()
931 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
936 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
940 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/birdland/bav335x/
H A Dboard.c407 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
413 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/compulab/cm_t335/
H A Dcm_t335.c138 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/compulab/cm_t43/
H A Dcm_t43.c155 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/silica/pengwyn/
H A Dboard.c192 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/ti/am335x/
H A Dboard.c968 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
972 writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); in board_eth_init()
978 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/phytec/pcm051/
H A Dboard.c237 writel(RMII_RGMII2_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/gumstix/pepper/
H A Dboard.c255 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/isee/igep003x/
H A Dboard.c281 &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/tcl/sl50/
H A Dboard.c348 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/siemens/draco/
H A Dboard.c333 writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/siemens/rut/
H A Dboard.c186 writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/siemens/pxm2/
H A Dboard.c230 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
/openbmc/u-boot/board/vscom/baltos/
H A Dboard.c458 writel((GMII1_SEL_RMII | GMII2_SEL_RGMII | RGMII2_IDMODE), &cdev->miisel); in board_eth_init()
/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dcpu.h505 unsigned int miisel; /* offset 0x50 */ member