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Searched refs:mem_timings (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/arch/arm/mach-omap2/
H A Dsdrc2xxx.c42 return mem_timings.slow_dll_ctrl; in omap2xxx_sdrc_get_slow_dll_ctrl()
47 return mem_timings.fast_dll_ctrl; in omap2xxx_sdrc_get_fast_dll_ctrl()
52 return mem_timings.m_type; in omap2xxx_sdrc_get_type()
124 mem_timings.base_cs = 1; in omap2xxx_sdrc_init_params()
126 mem_timings.base_cs = 0; in omap2xxx_sdrc_init_params()
128 if (mem_timings.m_type != M_DDR) in omap2xxx_sdrc_init_params()
135 mem_timings.dll_mode = M_LOCK; in omap2xxx_sdrc_init_params()
137 if (mem_timings.base_cs == 0) { in omap2xxx_sdrc_init_params()
153 mem_timings.fast_dll_ctrl, in omap2xxx_sdrc_init_params()
154 mem_timings.base_cs, in omap2xxx_sdrc_init_params()
[all …]
/openbmc/u-boot/arch/arm/mach-exynos/
H A Ddmc_common.c17 int dmc_config_zq(struct mem_timings *mem, uint32_t *phy0_con16, in dmc_config_zq()
95 void dmc_config_mrs(struct mem_timings *mem, uint32_t *directcmd) in dmc_config_mrs()
136 void dmc_config_prech(struct mem_timings *mem, uint32_t *directcmd) in dmc_config_prech()
157 struct mem_timings *mem; in mem_ctrl_init()
H A Dclock_init.h38 struct mem_timings { struct
146 struct mem_timings *clock_get_mem_timings(void); argument
H A Dexynos5_setup.h887 struct mem_timings;
903 int ddr3_mem_ctrl_init(struct mem_timings *mem, int reset);
918 int dmc_config_zq(struct mem_timings *mem, uint32_t *phy0_con16,
927 void dmc_config_mrs(struct mem_timings *mem, uint32_t *directcmd);
935 void dmc_config_prech(struct mem_timings *mem, uint32_t *directcmd);
H A Dclock_init_exynos5.c136 struct mem_timings mem_timings[] = { variable
522 struct mem_timings *clock_get_mem_timings(void) in clock_get_mem_timings()
524 struct mem_timings *mem; in clock_get_mem_timings()
532 for (i = 0, mem = mem_timings; i < ARRAY_SIZE(mem_timings); in clock_get_mem_timings()
551 struct mem_timings *mem; in exynos5250_system_clock_init()
786 struct mem_timings *mem; in exynos5420_system_clock_init()
H A Ddmc_init_exynos4.c31 struct mem_timings mem = {
H A Dexynos4_setup.h405 struct mem_timings { struct
H A Ddmc_init_ddr3.c35 int ddr3_mem_ctrl_init(struct mem_timings *mem, int reset) in ddr3_mem_ctrl_init()
440 int ddr3_mem_ctrl_init(struct mem_timings *mem, int reset) in ddr3_mem_ctrl_init()